w83195bg-120 Winbond Electronics Corp America, w83195bg-120 Datasheet - Page 14

• Manufacturer Part Number: w83195bg-120
• Description: Winbond Clock Generator W83195br-120/w83195bg-120 For Intel 915/945 Chipset
• Manufacturer: Winbond Electronics Corp America

7.6
7.7
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 5: Watchdog Control (Default: 02h)
Register 6: PCIE Control (1 = Enable, 0 = Disable) (Default: FEh)
SEL24_48
EN_WD
WD_TIMEOUT
SAF_FREQ [4]
SAF_FREQ [3]
SAF_FREQ [2]
SAF_FREQ [1]
SAF_FREQ [0]
SRCEN
Reserved
PCIEEN<4>
PCIEEN<3>
PCIEEN<2>
PCIEEN<1>
PCIEEN<0>
Reserved
NAME
NAME
PWD
X
0
0
0
0
0
1
0
PWD
1
1
1
1
1
1
1
0
24 / 48 MHz output selection, 1: 24 MHz, 0: 48 MHz (Default).
Default value follow hardware trapping data on SEL24_48# pin.
Program this bit =>
1: Enable Watchdog Timer feature.
0: Disable Watchdog Timer feature.
Enable WD sequence =>
Program this bit to 1 firstly, then program the
Reg-20 to start the counting
Read-back this bit =>
During timer count down,
If count to zero,
Read only. Timeout Flag.
1: Watchdog has ever started and counts to zero.
0: Watchdog is restarted and counting.
When Watchdog Timer times out and EN_SAFE_FREQ=1, these bits
will be reloaded to Reg-0 bit 7~3 to select the clock frequencies.
SRCCLKT/C output control
Reserved
PCIET4/C4 output control
PCIET3/C3 output control
PCIET2/C2 output control
PCIET1/C1 output control
PCIET0/C0 output control
Reserved
W83195BR-120/W83195BG-120
reading this bit returns
-10-
reading this bit returns
DESCRIPTION
DESCRIPTION
0.
1.