w83195bg-120 Winbond Electronics Corp America, w83195bg-120 Datasheet - Page 16

• Manufacturer Part Number: w83195bg-120
• Description: Winbond Clock Generator W83195br-120/w83195bg-120 For Intel 915/945 Chipset
• Manufacturer: Winbond Electronics Corp America

7.11 Register 10: Reserved (Default: 3Bh)
7.12 Register 11: Spread Spectrum Programming (Default: 0Eh)
7.13 Register 12: Divisor Control (Default: 08h)
Table-2 PCI, PCIE, CPU divider ratio selection Table
BIT
BIT
BIT
Bit2/
Bit4/
7
6
5
4
3
2
1
0
Bit6
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
MSB
LSB
SRC_SPSPEN
N3VAL<6>
N3VAL<5>
N3VAL<4>
N3VAL<3>
N3VAL<2>
N3VAL<1>
N3VAL<0>
KVAL6
KVAL5
KVAL4
KVAL3
KVAL2
KVAL1
KVAL0
SP_UP [3]
SP_UP [2]
SP_UP [1]
SP_UP [0]
SP_DOWN [3]
SP_DOWN [2]
SP_DOWN [1]
SP_DOWN [0]
Reserved
NAME
NAME
NAME
0
1
Div12
Div20
PWD
0
PWD
PWD
0
0
0
0
1
1
1
0
0
1
1
1
0
1
1
0
X
X
X
X
X
X
X
0
BIT5
PCI
Spread Spectrum Up Counter bit 3 ~ bit 0.
Spread Spectrum Down Counter bit 3 ~ bit 0
2’s complement representation.
Ex: 1 -> 1111; 2 -> 1110; 7 -> 1001; 8 -> 1000
Enable SRCLOOP spread spectrum feature
1: Enable, 0: Disable
Programmable N3 divisor bit 6 ~0 for programmable
Reserved
Define the PCI divider ratio
Table-2 integrate the all divider configuration
Define the PCIE divider ratio
Refer to Table-2
Define the CPU divider ratio
Refer to Table-2
Div16
Div24
1
Div3
Div8
0
W83195BR-120/W83195BG-120
PCIE
BIT3
-12-
Div4
Div6
1
DESCRIPTION
DESCRIPTION
DESCRIPTION
Div2
Div8
00
Div3
Div8
01
BIT1, 0
CPU
Div4
Div8
10
Div6
Div8
11