74hct9046a NXP Semiconductors, 74hct9046a Datasheet - Page 33

• Manufacturer Part Number: 74hct9046a
• Description: Pll With Bandgap Controlled Vco
• Manufacturer: NXP Semiconductors

Philips Semiconductors
PLL design example
The frequency synthesizer used in the design example
shown in Fig.34 has the following parameters:
The open loop gain is:
H (s)
and the closed loop:
where:
The programmable counter ratio K
follows:
The VCO is set by the values of R1, R2 and C1;
R2 = 10 k (adjustable).
The values can be determined using the information in
Table 2.
With f
values
(V
The VCO gain is:
The gain of the phase comparator PC2 is:
2003 Oct 30
N
K
K
------ -
N
max
v
p
min
u
Output frequency: 2 MHz to 3 MHz.
Frequency steps: 100 kHz.
Settling time: 1 ms.
Overshoot: <20%.
K
K
K
K
CC
R1 = 30 k .
R2 = 30 k .
C1 = 100 pF.
i
PLL with band gap controlled VCO
p
f
o
n
=
=
=
= low-pass filter transfer gain
= phase comparator gain
= K
=
= 5.0 V):
c
=
------------------------------------------- -
=
------------
4
----------------------------------------------------- -
1
= 2.5 MHz and f
1
V
G (s) = K
5
K
+
f
----------- -
n
f
v
f
----------- -
CC
f
OUT
step
OUT
/s VCO gain
step
p
divider ratio.
K
2f
p
–
=
L
K
1.1
=
=
0.4V r
f
K
2
p
--------------------- -
100 kHz
f
--------------------- -
100 kHz
2 MHz
K
3 MHz
–
o
K
K
1.1
o
f
K
L
=
K
n
= 500 kHz this gives the following
K
o
n
=
=
1 MHz
---------------- - 2
20
2.8
30
K
n
n
can be found as
2.24 10
6
r s V
33
Using PC2 with the passive filter as shown in Fig.34 results
in a high gain loop with the same performance as a loop
with an active filter. Hence loop filter equations as for a
high gain loop should be used. The current source output
of PC2 can be simulated then with a fictive filter resistance:
The transfer functions of the filter is given by:
Where:
The characteristic equation is:
This results in:
or:
This can be written as:
with the natural frequency
and the damping value given as:
In Fig.35 the output frequency response to a step of input
frequency is shown.
The overshoot and settling time percentages are now used
to determine
damping ratio = 0.707 will produce an overshoot of less
than 20% and settle to within 5% at
settling time is 1 ms. This results in:
R3'
K
1
s
s
2
f
2
n
n
+
+
1
2
=
+
K
=
=
= R3'
= R4
sK
=
2
p
1
----------------- -
5
-- -
t
R
------ -
17
+
s
1
----------------- -
p
K
------------------------------- -
K
=
b
+
s
s
n
p
2
v
s
s
-------------- -
0.001
K
1
2
C2.
+
C2.
K
n
5
2
---- -
1
v
n
2
1
. From Fig.35 it can be seen that the
K
----- - K
s
n
+
v
K
=
K
2
n
n
p
5 10
=
K
=
v
0
0
K
n
3
r s
n
1
defined as:
1
=
.
+
0
74HCT9046A
K
=
p
Product specification
n
0.5
t = 5. The required
K
f
K
2
o
K
n
n