74hct9046a NXP Semiconductors, 74hct9046a Datasheet - Page 7

no-image

74hct9046a

Manufacturer Part Number
74hct9046a
Description
Pll With Bandgap Controlled Vco
Manufacturer
NXP Semiconductors
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74hct9046aD
Manufacturer:
INTEL
Quantity:
3
Part Number:
74hct9046aD
Manufacturer:
PHILIPS
Quantity:
1 893
Part Number:
74hct9046aD
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
74hct9046aD
Quantity:
95
Company:
Part Number:
74hct9046aD
Quantity:
95
Part Number:
74hct9046aN
Manufacturer:
PHILIPS
Quantity:
2 967
Part Number:
74hct9046aPW
Manufacturer:
NXP
Quantity:
12 500
Part Number:
74hct9046aPW,118
Manufacturer:
CY
Quantity:
490
Philips Semiconductors
Phase comparators
The signal input (pin SIG_IN) can be directly coupled to
the self-biasing amplifier at pin SIG_IN, provided that the
signal swing is between the standard HC family input logic
levels. Capacitive coupling is required for signals with
smaller swings.
P
This circuit is an EXCLUSIVE-OR network. The signal and
comparator input frequencies (f
factor to obtain the maximum locking range. The transfer
characteristic of PC1, assuming ripple (f
is suppressed, is:
where:
The phase comparator gain is:
2003 Oct 30
HASE COMPARATOR
V
V
PLL with band gap controlled VCO
Fig.6
DEM_OUT
DEM_OUT
V
DEM_OUT
PC_IN
V DEM_OUT(AV)
=
Phase comparator 1; average output
voltage as a function of input phase
difference.
=
0.5V
is the demodulator output at pin DEM_OUT.
= V
SIG_IN
V
V
PC1_OUT
CC
CC
PC1_OUT
0
V
0
DEM_OUT
o
1 (PC1)
COMP_IN
=
V
---------- -
(via low-pass).
CC
=
SIG_IN
V
---------- -
i
) must have a 50% duty
K
CC
90
p
o
=
COMP_IN
V
---------- - V r
SIG_IN
CC
r
PC_IN
= 2f
MBD101
i
)
180
COMP_IN
o
7
The average output voltage from PC1, fed to the VCO
input via the low-pass filter and seen at the demodulator
output at pin DEM_OUT (V
phase differences of signals (SIG_IN) and the comparator
input (COMP_IN) as shown in Fig.6. The average of
V
noise at SIG_IN and with this input the VCO oscillates at
the centre frequency (f
loop locked at f
the actual waveforms across the VCO capacitor at pins
C1A and C1B (V
between these ramps and the VCO_OUT voltage.
The frequency capture range (2f
frequency range of input signals on which the PLL will lock
if it was initially out-of-lock. The frequency lock range (2f
is defined as the frequency range of the input signals on
which the loop will stay locked if it was initially in lock.
The capture range is smaller or equal to the lock range.
With PC1, the capture range depends on the low-pass
filter characteristics and can be made as large as the lock
range. This configuration remains locked even with very
noisy input signals. Typical behaviour of this type of phase
comparator is that it may lock to input frequencies close to
the harmonics of the VCO centre frequency.
DEM_OUT
Fig.7
VCO_OUT
PC1_OUT
COMP_IN
VCO_IN
SIGN_IN
V C1A
V C1B
is equal to 0.5V
Typical waveforms for PLL using phase
comparator 1; loop-locked at f
c
are shown in Fig.7. This figure also shows
C1A
and V
c
). Typical waveforms for the PC1
CC
DEM_OUT
C1B
when there is no signal or
) to show the relation
c
) is defined as the
74HCT9046A
), is the resultant of the
Product specification
c
.
MBD100
GND
V CC
C1A
C1B
L
)

Related parts for 74hct9046a