74hct9046a NXP Semiconductors, 74hct9046a Datasheet - Page 6

• Manufacturer Part Number: 74hct9046a
• Description: Pll With Bandgap Controlled Vco
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FUNCTIONAL DESCRIPTION
The 74HCT9046A is a phase-locked-loop circuit that
comprises a linear VCO and two different phase
comparators (PC1 and PC2) with a common signal input
amplifier and a common comparator input (see Fig.4).
The signal input can be directly coupled to large voltage
signals (CMOS level), or indirectly coupled (with a series
capacitor) to small voltage signals. A self-bias input circuit
keeps small voltage signals within the linear region of the
input amplifiers. With a passive low-pass filter, the
74HCT9046A forms a second-order loop PLL.
The principle of this phase-locked-loop is based on the
familiar 74HCT4046A. However extra features are built-in,
allowing very high-performance phase-locked-loop
applications. This is done, at the expense of PC3, which is
skipped in this 74HCT9046A. The PC2 is equipped with a
current source output stage here. Further a band gap is
applied for all internal references, allowing a small centre
frequency tolerance. The details are summed up in the
next section: “Differences with respect to the familiar
74HCT4046A”. If one is familiar with the 74HCT4046A
already, it will do to read this section only.
Differences with respect to the familiar 74HCT4046A
2003 Oct 30
A centre frequency tolerance of maximum 10%.
The on board band gap sets the internal references
resulting in a minimal frequency shift at supply voltage
variations and temperature variations.
The value of the frequency offset is determined by an
internal reference voltage of 2.5 V instead of
V
over the supply voltage range.
A current switch charge pump output on pin PC2_OUT
allows a virtually ideal performance of PC2. The gain of
PC2 is independent of the voltage across the low-pass
filter. Further a passive low-pass filter in the loop
achieves an active performance. The influence of the
parasitic capacitance of the PC2 output plays no role
here, resulting in a true correspondence of the output
correction pulse and the phase difference even up to
phase differences as small as a few nanoseconds.
Because of its linear performance without dead zone,
higher impedance values for the filter, hence lower
C-values, can now be chosen. Correct operation will not
be influenced by parasitic capacitances as in the
instance with voltage source output of the 4046A.
PLL with band gap controlled VCO
CC
0.7 V. In this way the offset frequency will not shift
6
VCO
The VCO requires one external capacitor C1 (between
pins C1A and C1B) and one external resistor R1 (between
pins R1 and GND) or two external resistors R1 and R2
(between pins R1 and GND, and R2 and GND).
Resistor R1 and capacitor C1 determine the frequency
range of the VCO. Resistor R2 enables the VCO to have a
frequency offset if required (see Fig.5).
The high input impedance of the VCO simplifies the design
of the low-pass filters by giving the designer a wide choice
of resistor/capacitor ranges. In order not to load the
low-pass filter, a demodulator output of the VCO input
voltage is provided at pin DEM_OUT. The DEM_OUT
voltage equals that of the VCO input. If DEM_OUT is used,
a load resistor (R
pin DEM_OUT to GND; if unused, DEM_OUT should be
left open. The VCO output (pin VCO_OUT) can be
connected directly to the comparator input
(pin COMP_IN), or connected via a frequency divider.
The output signal has a duty factor of 50% (maximum
expected deviation 1%), if the VCO input is held at a
constant DC level. A LOW level at the inhibit input
(pin INH) enables the VCO and demodulator, while a
HIGH level turns both off to minimize standby power
consumption.
No PC3 on pin RB but instead a resistor connected to
GND, which sets the load/unload currents of the charge
pump (PC2).
Extra GND pin 1 to allow an excellent FM demodulator
performance even at 10 MHz and higher.
Combined function of pin PC1_OUT/PCP_OUT.
If pin RB is connected to V
pin PC1_OUT/PCP_OUT has its familiar function viz.
output of PC1. If at pin RB a resistor (R
to GND it is assumed that PC2 has been chosen as
phase comparator. Connection of R
internal circuitry and this changes the function of
pin PC1_OUT/PCP_OUT into a lock detect output
(PCP_OUT) with the same characteristics as PCP_OUT
of pin 1 of the 74HCT4046A.
The inhibit function differs. For the HCT4046A a HIGH
level at the inhibit input (pin INH) disables the VCO and
demodulator, while a LOW level turns both on. For the
74HCT9046A a HIGH level on the inhibit input disables
the whole circuit to minimize standby power
consumption.
s
) should be connected from
CC
(no bias resistor R
74HCT9046A
Product specification
b
is sensed by
b
) is connected
b
)