mc1451a-e ETC-unknow, mc1451a-e Datasheet - Page 39

• Manufacturer Part Number: mc1451a-e
• Description: Advanced Brushless Motor Control Chipset
• Manufacturer: ETC-unknow

The waveform is centered around a value of 0 volts. The magnitude of
the generated waveform is proportional to either the output of the servo
filter or the motor command register (depending on the commutation
mode and motor on/off status).
For example if the chipset is connected to a DAC with output range of -
10 Volts to + 10 Volts and the chipset is set to open loop mode with a
motor command value of 32,767 (which is the maximum allowed value)
than as the motor rotates through a full electrical cycle, a sinusoidal
waveform centered at 0 volts will be output with a minimum voltage of -
10, and a maximum voltage of +10.
DAC16 Decoding
The digital values output by the chipset to the DAC encode the desired
voltages as a 16-bit digital word. The minimum voltage is output as a
digital word value of 0, a voltage of 0 Volts is output as a digital word of
32,768 (dec.), and the maximum positive voltage is output as a digital
word value of 65,535.
To load each of the four (MC1231A) or two (MC1131A) DACs, the DAC
control pins in combination with the chipset's 16-bit data bus are used.
To load a particular DAC, The DAC address (1 of 4) is output on the
signals DAC16Addr0-1, the 16 bits of DAC data are output on pins
Data0-11 (high 12 bits), as well as DACLow0-3 (low 4 bits), I/OAddr0-3
and DACSlct are high, and I/OWrite is low.
For more information on the DAC signal timing & conditions, see the
Pin Descriptions and timing diagrams section of this manual.
DACs with lower resolution than 16 bits can also be used. To connect
to a DAC with less resolution, the high order bits of the 16-bit data word
should be used. For example, to connect to an 8-bit DAC, bits Data4-
Data11 should be used. The low order 8 bits are written to by the
chipset, but ignored by the DAC circuitry.
PWM Decoding
The PWM output mode also outputs a sinusoidal desired voltage
waveform for each phase, however the method by which these signals
encode the voltage differ substantially from the DAC16 digital word.
The PWM output mode uses a single signal per output motor phase.
This signal contains a pulse-width encoded representation of the
desired voltage. In this encoding the duty cycle of the waveform
determines the desired voltage. The PWM cycle has a frequency of
24.5 kHz, with a resolution of 10 bits, or 1/1,024.
The following chart shows the encoding.
39
An output pulse width of 0 parts per 1,024 represents the maximum
negative voltage, an output pulse width of 512 per 1,024 (50 %)
represents a voltage of 0, and a pulse width of 1,024 per 1,024
represents the maximum positive voltage.
This PWM scheme has been chosen to allow convenient interfacing to
half bridge type amplifiers by connecting the PWM output to a level
shifter circuit , and using this output to drive the high and low side
drivers of the bridge.
(max. neg.
1024/1024
(max. pos.
512/1024
(0 value)
0/1024
value)
value)
1
0
1
0
1
0