pcf8563 NXP Semiconductors, pcf8563 Datasheet - Page 10

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pcf8563

Manufacturer Part Number
pcf8563
Description
Real-time Clock/calendar
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCF8563_5
Product data sheet
7.6.5 Clock output control register
7.6.6 Countdown timer
Table 19.
Table 20.
Table 21.
The timer register is an 8-bit binary countdown timer. It is enabled and disabled via the
timer control register bit TE. The source clock for the timer is also selected by the timer
control register. Other timer properties such as interrupt generation are controlled via
control/status 2 register.
For accurate read back of the countdown value, the I
operating at a frequency of at least twice the selected timer clock.
Table 22.
Table 23.
Bit
7
2 to 0
Bit
7
1 to 0
FD1
0
0
1
1
Bit
7
1 to 0
TD1
0
0
1
1
Symbol
AE
ALARM_
WEEKDAYS
Symbol
FE
FD1 and
FD0
Symbol
TE
TD1 and
TD0
Weekday alarm (address 0Ch) bits description
CLKOUT control (address 0Dh) bits description
FD1 and FD0: CLKOUT frequency selection
Timer control (address 0Eh) bits description
TD1 and TD0: Timer frequency selection
FD0
0
1
0
1
TD0
0
1
0
1
Value
0
1
Value
0
1
Value
0
1
0 to 6
Rev. 05 — 17 July 2007
Description
the CLKOUT output is inhibited and CLKOUT output is set to
high-impedance
the CLKOUT output is activated
these bits control the frequency output at pin CLKOUT;
see
Description
timer is disabled
timer is enabled
timer source clock frequency select; these bits determine the
source clock for the countdown timer, see
use, TD1 and TD0 should be set to
Description
weekday alarm is enabled
weekday alarm is disabled
this register holds the weekday alarm information coded in
BCD format
Table 21
CLKOUT frequency
32.768 kHz
1024 Hz
32 Hz
1 Hz
TIMER Source clock frequency
4096 Hz
64 Hz
1 Hz
1 60 Hz
2
C-bus clock (SCL) must be
1
60
Real time clock/calendar
Hz for power saving
Table
PCF8563
© NXP B.V. 2007. All rights reserved.
23; when not in
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