pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 26

• Manufacturer Part Number: pcf8814
• Description: Pcf8814 65 X 96 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
11 INSTRUCTIONS
The PCF8814 interfaces via two different 3-line serial
interfaces, or a 4-line serial interface or an I
interface. Processing of the instructions does not require
the display clock.
Data accesses to the PCF8814 can be broken-down into
two areas, those that define the operating mode of the
device, and those that fill the display RAM. For the 4-line
SPI interface the distinction is the D/C pad. When the D/C
pad is logic 0, the chip will respond to instructions as
defined in Table 8. When the D/C bit is logic 1, the chip will
send data into the RAM.
When the 3-line SPI or the 3-line serial interface is used,
the distinction between instructions which define the
Table 8 Instruction set
2003 Mar 13
Write data
Horizontal addressing
Power control
Set bias
Charge pump control
Set initial display line
Set V
Display mode
Data order
RAM addressing mode
Partial display position
n-line inversion
Vertical addressing
Vertical mirroring
Set partial display
ID read
ID read
65
INSTRUCTION
OP
(2)
96 pixels matrix LCD driver
D/C
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
D7
F1
D
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(1)
(1)
7
x
x
x
D6
D
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
(1)
(1)
(1)
6
2
C-bus
x
x
x
D5
D
L
0
0
1
1
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
(1)
(1)
(1)
5
5
COMMAND BYTE
V
x
x
D4
D
N
L
1
0
1
0
0
0
0
0
0
1
0
1
1
1
0
1
0
0
1
(1)
pr4
(1)
4
4
4
26
V
MY
x
x
x
D3
operating mode of the device, and those that fill the display
RAM is made respectively by the Display data length
instruction (3-line SPI) or by the D/C bit in the data stream
(3-line serial interface).
There are four types of instructions used to perform the
following:
Note that in the command byte, D7 is the most significant
bit.
D
X
N
Y
L
1
0
1
0
0
0
1
1
1
1
1
0
1
1
1
(1)
(1)
pr3
(1)
3
3
3
3
3
Defining device functions such as display configuration
Setting internal RAM addresses
Performing data transfer with internal RAM
Other instructions.
BS
V
V
PC
x
x
D2
D
X
X
C
N
Y
P
L
1
1
1
1
0
0
1
1
0
0
1
(1)
pr7
pr2
(1)
2
2
2
6
2
2
2
2
2
BS
V
V
x
x
D1
S1
D
X
X
C
N
Y
P
L
0
0
1
1
0
1
0
0
1
1
0
(1)
pr6
pr1
(1)
1
1
5
1
1
1
1
1
1
DON display ON/OFF
DOR swap RAM MSB/LSB order
DAL all on/normal display
BS
V
V
x
x
D0
S0
D
C
N
X
X
L
Y
P
E
V
1
0
1
0
1
0
(1)
pr5
pr0
(1)
0
0
4
0
0
0
0
0
0
RAM data
set X-address, lower 4 bits
set X-address, upper 3 bits
charge pump on/off
set bias system
set multiplication factor
set start row address
write V
normal/inverse display
vertical or horizontal mode
set initial row (R0) of the
display
set n value
set Y-address
mirror Y axis (about X axis)
set partial display 1:8 to 1:65
identification: ID1
identification: ID2
identification: ID3
OP
Objective specification
FUNCTION
register
PCF8814