m48t212a STMicroelectronics, m48t212a Datasheet - Page 2

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m48t212a

Manufacturer Part Number
m48t212a
Description
3.3v Timekeeper Controller
Manufacturer
STMicroelectronics
Datasheet

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0
M48T212A
Figure 2. SOIC Connections
The lithium energy source (or super capacitor)
used to permanently power the real time clock is
also used to retain RAM data in the absence of
V
The chip enable outputs to RAM (E1
E2
prevent data corruption. The date is automatically
adjusted for months with less than 31 days and
corrects for leap years. The internal watchdog tim-
er provides programmable alarm windows.
The nine clock bytes (Fh - 9h and 1h) are not the
actual clock counters, they are memory locations
consisting of BiPORT
within the static RAM array. Clock circuitry up-
dates the clock bytes with current information once
per second. The information can be accessed by
the user in the same manner as any other location
in the static memory array.
Byte 8h is the clock control register. This byte con-
trols user access to the clock information and also
stores the clock calibration setting. Byte 7h con-
2/20
CC
CON
power through the V
RSTIN1
RSTIN2
E2 CON
) are controlled during power transients to
DQ0
DQ1
DQ2
RST
V SS
WDI
NC
XO
NC
NC
NC
NC
NC
A3
A2
A1
A0
XI
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
M48T212A
TM
OUT
read/write memory cells
AI03048
pin.
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
V CC
V OUT
V CCSW
IRQ/FT
EX
NC
NC
NC
NC
NC
G
W
V BAT–
NC
E
E1 CON
DQ7
DQ6
DQ5
DQ4
DQ3
V CAP
CON
and
Table 1. Signal Names
tains the watchdog timer setting. The watchdog
timer can generate either a reset or an interrupt,
depending on the state of the Watchdog Steering
bit (WDS). Bytes 6h-2h include bits that, when pro-
grammed, provide for clock alarm functionality.
Alarms are activated when the register content
matches the month, date, hours, minutes, and
seconds of the clock registers. Byte 1h contains
century information. Byte 0h contains additional
flag information pertaining to the watchdog timer,
alarm and battery status.
The M48T212A also has its own Power-Fail De-
tect circuit. This control circuitry constantly moni-
tors the supply voltage for an out of tolerance
condition. When V
write protects the TIMEKEEPER register data and
external SRAM, providing data security in the
midst of unpredictable system operation. As V
falls, the control circuitry automatically switches to
the battery, maintaining data and clock operation
until valid power is restored.
A0-A3
DQ0-DQ7
XO
XI
RSTIN1
RSTIN2
RST
WDI
A
E
EX
G
W
E1
E2
IRQ/FT
Vccsw
V
V
V
V
V
NC
OUT
CAP
BAT–
CC
SS
CON
CON
CC
Address Inputs
Data Inputs/Outputs
Oscillator Output
Oscillator Input
Reset 1 Input
Reset 2 Input
Reset Output (Open Drain)
Watchdog Input
Bank Select Input
Chip Enable Input
External Chip Enable Input
Output Enable Input
Write Enable Input
RAM Chip Enable 1 Output
RAM Chip Enable 2 Output
Int/Freq Test Output (Open Drain)
V
Supply Voltage Output
Super Capacitor Input
Battery Ground Pin (optional)
Supply Voltage
Ground
Not Connected internally
CC
is out of tolerance, the circuit
Switch Output
CC

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