m48t18 STMicroelectronics, m48t18 Datasheet - Page 14

• Manufacturer Part Number: m48t18
• Description: 5v, 64kbit 8 Kb X 8 Timekeeper Sram
• Manufacturer: STMicroelectronics

Clock operations
Reading the clock
Setting the clock
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Updates to the TIMEKEEPER
prevent reading data in transition. The BiPORT™ TIMEKEEPER cells in the RAM array are
only data registers and not the actual clock counters, so updating the registers can be
halted without disturbing the clock itself.
Updating is halted when a '1' is written to the READ Bit, the seventh bit in the control
register. As long as a '1' remains in that position, updating is halted. After a halt is issued,
the registers reflect the count; that is, the day, date, and the time that were current at the
moment the halt command was issued.
All of the TIMEKEEPER registers are updated simultaneously. A halt will not interrupt an
update in progress. Updating is within a second after the bit is reset to a '0.'
The eighth bit of the control register is the WRITE Bit. Setting the WRITE Bit to a '1,' like the
READ Bit, halts updates to the TIMEKEEPER registers. The user can then load them with
the correct day, date, and time data in 24 hour BCD format (on
WRITE Bit to a '0' then transfers the values of all time registers (1FF9h-1FFFh) to the actual
TIMEKEEPER counters and allows normal operation to resume. The FT Bit and the bits
marked as '0' in
operation.
See the Application Note AN923, “TIMEKEEPER
information on Century Rollover.
Table 5
must be written to '0' to allow for normal TIMEKEEPER and RAM
®
registers should be halted before clock data is read to
®
Rolling Into the 21
Table
5). Resetting the
st
Century” for