m48t18 STMicroelectronics, m48t18 Datasheet - Page 9

• Manufacturer Part Number: m48t18
• Description: 5v, 64kbit 8 Kb X 8 Timekeeper Sram
• Manufacturer: STMicroelectronics

Figure 5.
Note:
A0-A12
E1
E2
G
DQ0-DQ7
data will be available after the latter of the Chip Enable Access times (t
Output Enable Access time (t
The state of the eight three-state Data I/O signals is controlled by E1, E2 and G. If the
outputs are activated before t
until t
will remain valid for Output Data Hold time (t
address access.
Read mode AC waveforms
WRITE Enable (W) = High.
AVQV
. If the address inputs are changed while E1, E2 and G remain active, output data
tE2HQX
tE1LQX
tAVQV
tE2HQV
tE1LQV
tGLQX
AVQV
GLQV
tGLQV
, the data lines will be driven to an indeterminate state
).
tAVAV
VALID
AXQX
) but will go indeterminate until the next
VALID
tGHQZ
E1LQV
tAXQX
tE1HQZ
tE2LQZ
AI00962
or t
E2HQV
) or
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