cs5373a Cirrus Logic, Inc., cs5373a Datasheet
cs5373a
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cs5373a Summary of contents
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... Bipolar Power Supply Configuration • VA+ = +2.5 V; VA +3.3 V http://www.cirrus.com ∆Σ Description The CS5373A is a high-performance, fourth-order ∆Σ modulator integrated with a ∆Σ digital-to-analog convert- er (DAC). When combined with a CS3301A / CS3302A differential amplifier and the CS5378 digital filter, a differential ...
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... GPIO Connections ........................................................................................................... 27 7. ANALOG SIGNALS ................................................................................................................ 28 7.1 INR±, INF± Modulator Inputs ........................................................................................... 28 7.1.1 Modulator Input Impedance ................................................................................ 28 7.1.2 Modulator Anti-alias Filter ................................................................................... 28 7.2 DAC Output Attenuation .................................................................................................. 29 7.3 DAC OUT± Precision Output ........................................................................................... 29 7.4 DAC BUF± Buffered Output ............................................................................................. 30 7.5 DAC CAP± Connection .................................................................................................... 30 7.6 Analog Differential Signals ............................................................................................... 30 8. VOLTAGE REFERENCE ........................................................................................................ 31 2 ............................................................................................................ 20 CS5373A DS703F1 ...
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... Figure 14. Analog Signals ............................................................................................................. 28 Figure 15. DAC Output Attenuation Settings ................................................................................ 29 Figure 16. Voltage Reference Circuit ............................................................................................ 31 Figure 17. Power Supply Diagram ................................................................................................ 33 LIST OF TABLES Table 1. Selections for Operational Mode and DAC Attenuation .................................................... 4 Table 2. Operational Modes.......................................................................................................... 22 Table 3. Output Coding for the CS5373A Modulator and CS5378 Digital Filter Combination ...... 22 DS703F1 CS5373A 3 ...
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... Symbol ± 2% VA+ ± (Note 1) 2% VA- ± (Note 2, 3) VREF (Note 4) VREF- Industrial (-ISZ Selection CS5373A Specified Operating Conditions. A Min Nom Max 2.45 2.50 2.55 -2.45 -2.50 -2.55 3.20 3.30 3.40 - 2.500 - - - DAC Attenuation ATT[2:0] Attenuation 1 ...
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... Negative Analog VA- Digital VD (VA+) - (VA-) VA DIFF (VD) - (VA-) VD DIFF (Note 5) I PWR (Note (Note 5) I OUT PDN V INA V IND ± 100 mA will not cause SCR latch-up. CS5373A Min Typ Max Unit - ºC -65 - 150 º 125 º º Min Max Parameter -0.5 6.8 V -6.8 0 ...
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... IMAC VREF IMDC (Note 7) VREF IN Series Resistance ± INR ZDIF INR ± ZDIF INF INF ± INR ZSE INR ± ZSE INF INF C AA CS5373A Min Typ Max Unit - 2.500 - 120 - µA - 200 - µA - 160 - µ µV rms Ω ...
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... ZSE OUT 1/2 1/4 1/8 1/16 1/32 1/64 (Note 9) HZ OUT XT (Note 9) OUT R Load Resistance LBUF Load Capacitance C LBUF 1/1 - 1/64 ZDIF BUF 1/1 - 1/32 ZSE BUF (Note 11) (BUF-) 1/64 (Note 11) (BUF+) 1/64 (Note 9) HZ BUF (Note 9) XT BUF CS5373A Min Typ Max Unit MΩ 1.4 - kΩ - 10.1 - kΩ - 7.9 - kΩ - 5.1 - kΩ - 3.3 - kΩ - 2.3 - kΩ - 1.7 - kΩ ...
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... DC to 108 ( 430 Hz SDN (Note 16) THD (Note 16) LIN CMRR (Note 3) GA (Note 17 OFST (Note 18) OFST CAL (Note 19) OFST RNG (Note 17) OFST TC CS5373A Min Typ Max Unit DC - 2000 -2 (VA-)+2.5 - (VA-)+0.7 (VA+)-1.25 - 109 - dB - 121 - dB 121 ...
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... PERFORMANCE PLOTS Figure 2. Modulator + Test DAC Dynamic Performance DS703F1 Figure 1. Modulator Noise Performance CS5373A 9 ...
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... FS 1/2 - 1/4 - 1/8 - 1/16 - 1/32 - 1/64 - (Note 9) VAC - BW (Note 9, 20) VAC - IMP 1/1 VAC - 0.5 ABS VAC - 0.2 1/2 REL - 1/4 - 1/8 - 1/16 - 1/32 - 1/64 (Note 17) VAC - TC (Note 13) VAC - CM (Note 13, 17) VAC - CMTC CS5373A Typ Max Unit 2 1. 625 - mV pp 312 156. 78.125 - 100 Hz - -20 dBfs - 0.2 0.2 %FS ± 0.1 0.2 % ± 0 ± 0 -0.1 ± 0 -0.2 ± 0.3 ...
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... THD BUF 1/2 -> 2x 1/4 -> 4x 1/8 -> 8x 1/16 -> 16x 1/32 -> 32x 1/64 -> 64x 1/1 -> 1x THD BUFL 1/2 -> 2x 1/4 -> 4x 1/8 -> 8x 1/16 -> 16x 1/32 -> 32x 1/64 -> 64x ± ) include 1/f noise not present on the precision outputs (OUT CS5373A Min Typ Max Unit - 114 - dB - 114 - dB - 114 - dB - 113 - dB - 111 ...
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... CMTC 1/1 VDC - 5 CMM 1/1 -> OUT - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x 1/1 -> BUF - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x CS5373A Typ Max Unit - V (VA-)+2.35 µV/°C 300 - ± µ rms µ rms µ rms µ rms µ rms µ rms µ ...
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... VDC - TC (Note 13) VDC - CM (Note 13, 17) VDC - CMTC 1/1 -> OUT - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x 1/1 -> BUF - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x CS5373A Typ Max Unit 2 1. 625 - mV 312 156. 78.125 - mV 39.0625 - mV - 0.4 0.2 %FS ± 0.1 0.2 % ± 0 -0.1 ± 0 -0.2 ± 0 -0.5 ± 1 -1.0 ± 3 µ ...
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... IMP VCM - CMM VCM - CMM 1/1 VCM - ABS 1/2 VCM - REL 1/4 - 1/8 - 1/16 - 1/32 - (Note 17) VCM - TC (Note 28) VCM - CM (Note 17, 28) VCM - CMTC ) + (SIG )] / 2. max min CS5373A Typ Max Unit 2 1. 625 - mV pp 312 156. 78.125 - 100 Hz - -20 dBfs -115 -105 dB -95 - ...
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... (Note RISE (Note FALL (Note 9) V VD-0.3 OH (Note (Note OUT (Note RISE (Note FALL t rise t fall CS5373A Typ Max Unit - 0.8 V µA ± ± 100 ns - 100 0.3 V µA ± 100 ...
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... MDAT 14 OD (Note 33) MDAT 0xA2EBE0 FS (Note 34 tdata (Note 9) TBS 25 OD (Note 35) TBS - FS (Note 35) TBS - -20dB CS5373A Typ Max Unit 2.048 - MHz 488 - 300 122 - ns 976 - ns 122 - ns 1220 - ns 512 - kbits/s 1953 ...
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... MHz) MSYNC t 0 MDATA (512 kHz) MFLAG TDATA (256 kHz) MCLK (2.048 MHz) t mss MSYNC MDATA (2.048 MHz) MFLAG TDATA (256 kHz) DS703F1 Figure 4. System Timing Diagram t t msh mclk msync t mdata t tdata Figure 5. MCLK / MSYNC Timing Detail CS5373A 17 ...
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... (Note 36 (Note 36 (Note 36 (Note 36 (Note 36 (Note 36 (Note 36 (Note (Note 37) PSRR - CS5373A Typ Max Unit µ 0 µ µ 2 µ 4 µ 0 µ µ µ µ ...
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... Digital-to-Analog Converter The CS5373A test DAC is driven by a digital ∆Σ bit stream from the CS5378 digital filter’s test bit stream (TBS) generator and operates in either test modes. AC test modes ...
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... VREF+ + VREF- *Populate with 2 x 10nF 22nF C0G or better. INR+ INF 20nF 20nF C0G C0G INF- INR- VA- VA- 0.1µF Figure 8. Connection Diagram CS5373A System Telemetry µController or Configuration EEPROM Digital Filter w/ PLL Communication Interface VD 0.1µF VD CS5378 SIGNALS MODE0 GPIO MODE1 GPIO ...
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... CS5373A modulator and places the AC and DC test circuitry into a micro-power sleep state with the analog test outputs high impedance. Following completion of AC and DC system self-tests, the CS5373A is typically set into modulator mode for normal data acquisition. 4.4 AC Test Modes ...
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... V 000000 - VREF A2EBE0 > - (VREF + 5%) Error Flag Possible Table 3. Output Coding for the CS5373A Modulator and CS5378 Digital Filter Combination 5.1.3 Modulator Synchronization The modulator is designed to operate synchro- nously with other modulators in a measure- ment network rising edge on the MSYNC input resets the internal conversion state ma- chine to synchronize analog sample timing ...
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... Modulator Idle Tones The CS5373A modulator is ∆Σ type and so can produce ‘idle tones’ in the measurement band- width when the differential input signal is a steady-state DC signal near mid-scale. Idle tones result from low-frequency patterns in the output bit stream and appear in the measure- ment spectrum as small tones about -135 dB down from full scale ...
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... If the CS5373A’s low-power ∆Σ DAC architec- ture becomes unstable, persistent elevated noise will be present on the analog outputs and AC linearity will be poor. To recover stabil- ity, place the CS5373A into power down or sleep mode and restart the CS5378 test bit stream generator before placing the CS5373A , ...
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... MODE pins of the CS5373A to avoid delays associated with writ- ing to the CS5378 digital filter GPIO register. Sensor impedance can be measured using DC differential mode (MODE 5), provided matched series resistors are installed between ...
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... While the MSYNC signal synchronizes the internal oper- ation of the CS5373A, by default, it does not synchronize the phase of the incoming encod- ed digital test bit stream (TBS) sine wave un- less enabled in the digital filter TBSCFG register ...
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... If precise timing control of operational modes is required (for example, switching between DC modes for pulse generation), an external controller should directly toggle the MODE pins of the CS5373A to avoid the delay asso- ciated with writing to the CS5378 digital filter GPCFG register. CS5373A full-scale sine wave signal ...
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... INPUT FROM CS3301A CS3302A AMPLIFIER 7. ANALOG SIGNALS The CS5373A has multiple differential analog inputs and outputs. The modulator analog in- puts are separated into rough and fine charge differential pairs (INR±, INF±) for maximum sampling accuracy. Both sets of modulator in- ...
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... INF±). External anti-alias series resis- tors and differential capacitors create the re- quired anti-alias RC filters. 7.2 DAC Output Attenuation The CS5373A test DAC has seven analog out- put attenuation settings from 1/1 to 1/64 se- lected with the ATT2, ATT1, and ATT0 pins. When enabled, attenuation is applied to both the OUT± ...
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... DAC CAP± Connection The CS5373A test DAC requires C0G type capacitor to be connected differentially across the CAP± pins. This capacitor creates an internal anti-alias filter to eliminate high-fre- quency signals from the OUT± and BUF± ana- log outputs and helps to maintain the stability of the low-power ∆ ...
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... Regulator 100 µF From VA- Regulator 100 µF 8. VOLTAGE REFERENCE The CS5373A requires a 2.500 V precision voltage reference to be supplied to the VREF pins. 8.1 VREF Power Supply To guarantee proper regulation headroom for the voltage reference device, the voltage refer- ence GND pin should be connected to VA- in- ...
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... Gain drift specifications of the CS5373A do not include the tempera- 32 ture drift effects of external passive compo- nents or of the voltage reference device itself. ...
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... Power Supply Rejection Power supply rejection of the CS5373A is fre- quency dependent. The CS5378 digital filter rejects power supply noise for frequencies above the selected digital filter corner frequen- cy ...
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... SCR Latch-up The VA- pin is tied to the CS5373A CMOS substrate and must always be the most-nega- tive voltage applied to the device to ensure SCR latch-up does not occur. In general, latch-up may occur when any pin voltage ex- ceeds the limits specified Absolute Maximum Ratings It is recommended to connect the VA- power supply to system ground (GND) with a re- verse-biased Schottky diode ...
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... Common Mode Drift - The variation in the measured common mode voltage across the specified temperature range. DS703F1 ( rms magnitude of full scale signal rms magnitude of noise floor ( sum of the powers of the harmonic frequencies power of the fundamental frequency measured full scale voltage - theoretical full scale voltage theoretical full scale voltage CS5373A ( ( ( | •100 •100% 35 ...
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... MSYNC INF MDATA INR MFLAG Pin Description CS5373A System Ground Mode Select Mode Select Mode Select Attenuation Range Select Attenuation Range Select Attenuation Range Select Test Bit Stream Input Positive Digital Power Supply System Ground Master Clock Input ...
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... Modulator: enabled. DAC: AC OUT only, BUF high- Modulator: enabled. DAC: AC BUF only, OUT high- Modulator: enabled. DAC: DC common mode output Modulator: enabled. DAC: DC differential output Modulator: enabled. DAC: AC common mode output Modulator: sleep. DAC: sleep. CS5373A 37 ...
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... SIDE VIEW NOM MAX MIN -- 0.084 0.006 0.010 0.05 0.069 0.074 1.62 -- 0.015 0.22 0.4015 0.413 9.90 0.307 0.323 7.40 0.209 0.220 5.00 0.026 0.030 0.55 0.0354 0.041 0.63 4° 8° 0° JEDEC #: MO-150 Controlling Dimension is Millimeters CS5373A 1 E1 ∝ END VIEW L MILLIMETERS NOM MAX -- -- 2.13 0.15 0.25 1.75 1.88 -- 0.38 10.20 10.50 7.80 8.20 5.30 5.60 0.65 0.75 0.90 1.03 4° 8° NOTE 2 DS703F1 ...
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... INFORMATION Model CS5373A-ISZ (lead free) 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5373A-ISZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS703F1 Temperature -40 to +85 °C Peak Reflow Temp MSL Rating* 260 °C CS5373A Package 28-pin SSOP Max Floor Life ...
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... HISTORY Revision Date PP1 NOV 2005 Preliminary release for CS5373A. PP2 NOV 2005 Correct voltage units of full-scale DC differential output and common mode AC output at 1/4 attenuation. Add T sizes in Figure 8. Correct definition of pin 28 in Pin Description table. F1 DEC 2006 Updated to final status with most-recent characterization data for Cirrus QPL pro- cess ...