cs5373a Cirrus Logic, Inc., cs5373a Datasheet - Page 16

• Manufacturer Part Number: cs5373a
• Description: Low-power, High-performance ?? Modulator And Test Dac
• Manufacturer: Cirrus Logic, Inc.

DIGITAL CHARACTERISTICS (CONT.)
Notes: 30. MCLK is generated by the CS5378 digital filter. If MCLK is disabled, the device automatically enters a
16
Master Clock Input
MCLK Frequency
MCLK Period
MCLK Duty Cycle
MCLK Rise Time
MCLK Fall Time
MCLK Jitter (In-band or aliased in-band)
MCLK Jitter (Out-of-band)
Master Sync Input
MSYNC Setup Time to MCLK Rising
MSYNC Period
MSYNC Hold Time after MCLK Falling
MSYNC Instant to TDATA Start
MDATA Output
MDATA Output Bit Rate
MDATA Output Bit Period
MDATA Output One’s Density Range
Full-scale Output Code
TDATA Input
TDATA Input Bit Rate
TDATA Input One’s Density Range
TBSGAIN Full-scale Code
TBSGAIN -20 dB Code
31. MSYNC is generated by the CS5378 digital filter and is latched on MCLK rising edge, synchronization
32. TDATA can be delayed from 0 to 63 full bit periods by the test bit stream generator in the CS5378 digital
33. Decimated, filtered, and offset-corrected 24-bit output word from the CS5378 digital filter.
34. TDATA is generated by the test bit stream generator in the CS5378 digital filter.
35. TBSGAIN register value in the CS5378 digital filter.
power-down state.
instant (t
filter. The timing diagrams show no TBSDATA delay.
0
) on next MCLK rising edge.
Parameter
(Note 9,
(Note 9,
(Note 9,
(Note 9,
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
30)
30)
31)
31)
31)
32)
33)
34)
35)
35) TBS
9)
9)
9)
9)
9) MCLK
9)
9)
MCLK
MCLK
MDAT
MDAT
Symbol
TBS
TBS
t
f
t
t
t
msync
t
f
t
mdata
mdata
f
t
t
RISE
FALL
tdata
tdata
CLK
mclk
mss
msh
-20dB
OD
FS
OBJ
OD
DC
IBJ
FS
0xA2EBE0
Min
40
20
40
20
14
25
-
-
-
-
-
-
-
-
-
-
-
-
0x04B8F2
0x0078E5
2.048
1220
1953
Typ
488
122
976
122
512
256
-
-
-
-
-
-
-
-
0x5D1420
Max
300
60
50
50
86
75
1
-
-
-
-
-
-
-
-
-
-
-
CS5373A
kbits/s
kbits/s
MHz
Unit
DS703F1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
%
%
%