adc1213d125hn/c1 NXP Semiconductors, adc1213d125hn/c1 Datasheet - Page 26

• Manufacturer Part Number: adc1213d125hn/c1
• Description: Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps
• Manufacturer: NXP Semiconductors

Table 17.
[1]
[2]
Addr
Hex
0826
0827
0828
0829
082C
082D
084C
084D
0870
0871
0890
0891
an "*" in the Access column means that this register is subject to control access conditions in Write mode.
an "*" in the Default column replaces a bit of which the value depends on the binary level of external pins (e.g. CFG[3:0], Swing[1:0], Scrambler).
Register name
Cfg_7_CS_N
Cfg_8_Np
Cfg_9_S
Cfg_10_HD_CF
Cfg_01_2_LID
Cfg_02_2_LID
Cfg01_13_FCHK
Cfg02_13_FCHK
LaneA_0_Ctrl
LaneB_0_Ctrl
ADCA_0_Ctrl
ADCB_0_Ctrl
Register allocation map
R/W
R/W*
R
R/W*
R/W*
R/W*
R/W*
R
R
R/W
R/W
R/W
R/W
[1]
Bit definition
Bit 7
…continued
HD
0
0
0
0
0
0
0
0
0
Bit 6
SCR_IN_
SCR_IN_
MODE
MODE
CS[0]
0
0
0
0
0
0
0
Bit 5
LANE_MODE[1:0]
LANE_MODE[1:0]
0
0
0
0
0
0
ADC_MODE[1:0]
ADC_MODE[1:0]
Bit 4
0
0
0
FCHK[7:0]
FCHK[7:0]
Bit 3
0
0
0
0
0
0
Bit 2
LANE_
LANE_
POL
POL
LID[4:0]
LID[4:0]
NP[4:0]
0
0
0
0
N[3:0]
Bit 1
LANE_CLK_
LANE_CLK_
POS_EDGE
POS_EDGE
0
0
0
CF[1:0]
Bit 0
LANE_PD
LANE_PD
ADC_PD
ADC_PD
S
Default
Bin
0100 0***
0000 1111
0000 0000
*000 0000
0001 1011
0001 1100
**** ****
**** ****
0000 000*
0000 000*
0000 000*
0000 000*
[2]