adc1212d NXP Semiconductors, adc1212d Datasheet - Page 17

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adc1212d

Manufacturer Part Number
adc1212d
Description
Adc1212d Series Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
11. Application information
ADC1212D_SER
Product data sheet
11.1.1 SPI and Pin control modes
11.1.2 Operating mode selection
11.1.3
11.1 Device control
The ADC1212D can be controlled via the Serial Peripheral Interface (SPI control mode) or
directly via the I/O pins (Pin control mode).
The device enters Pin control mode at power-up and remains in this mode as long as pin
CS is held HIGH. In Pin control mode, the SPI pins SDIO, CS and SCLK are used as
static control pins.
SPI control mode is enabled by forcing pin CS LOW. Once SPI control mode has been
enabled, the device remains in this mode. The transition from Pin control mode to SPI
control mode is illustrated in
When the device enters SPI control mode, the output data standard and data format are
determined by the level on pin SDIO as soon as a transition is triggered by a falling edge
on CS.
The active ADC1212D operating mode (Power-up, Power-down or Sleep) can be selected
via the SPI interface (see
described in
Table 10.
Selecting the output data standard
The output data standard (CMOS or LVDS DDR) can be selected via the SPI interface
(see
ODS is HIGH, otherwise CMOS is selected.
Pin CTRL
0
0.3V
0.6V
V
Fig 15. Control mode selection.
DDA
DDA
DDA
Table
Operating mode selection via pin CTRL
24) or by using pin ODS in Pin control mode. LVDS DDR is selected when
Table
SCLK/DFS
SDIO/ODS
All information provided in this document is subject to legal disclaimers.
10.
CS
Rev. 2 — 4 March 2011
two's complement
Pin control mode
Table
Data format
LVDS DDR
Figure
Operating mode
Power-down
Sleep
Power-up
Power-up
21) or by using pin CTRL in Pin control mode, as
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
15.
offset binary
Data format
CMOS
ADC1212D series
R/W
SPI control mode
W1
Output high-Z
yes
yes
yes
no
W0
005aaa039
A12
© NXP B.V. 2011. All rights reserved.
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