adc1212d NXP Semiconductors, adc1212d Datasheet - Page 32

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adc1212d

Manufacturer Part Number
adc1212d
Description
Adc1212d Series Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 20.
Default values are highlighted.
Table 21.
Default values are highlighted.
Table 22.
Default values are highlighted.
ADC1212D_SER
Product data sheet
Bit
7 to 2
1
0
Bit
7
6 to 4
3 to 2
1 to 0
Bit
7 to 5
4
3
2
1
0
Symbol
RESERVED[5:0]
ADCB
ADCA
Symbol
-
SE_SEL
DIFF_SE
RESERVED
CLKDIV
DCS_EN
Symbol
SW_RST
RESERVED[2:0]
-
OP_MODE[1:0]
Channel index control register (address 0003h) bit description
Reset and operating mode control register (address 0005h) bit description
Clock control register (address 0006h) bit description
All information provided in this document is subject to legal disclaimers.
Access
-
R/W
R/W
Access
-
R/W
R/W
-
R/W
R/W
Access
R/W
-
-
R/W
Rev. 2 — 4 March 2011
Value
111111
0
1
0
1
Value
000
0
1
0
1
0
0
1
0
1
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
Value
0
1
000
00
00
01
10
11
Description
reserved
next SPI command for ADC B
next SPI command for ADC A
Description
not used
single-ended clock input pin select
differential/single-ended clock input select
reserved
clock input divide by 2
duty cycle stabilizer
Description
reset digital section
reserved
not used
operating mode
ADC B not selected
ADC B selected
ADC A not selected
ADC A selected
CLKM
CLKP
fully differential
single-ended
disabled
enabled
disabled
enabled
no reset
performs a reset on SPI registers
normal (Power-up)
Power-down
Sleep
normal (Power-up)
ADC1212D series
© NXP B.V. 2011. All rights reserved.
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