adc12062biv National Semiconductor Corporation, adc12062biv Datasheet - Page 14

• Manufacturer Part Number: adc12062biv
• Description: 12-bit, 1 Mhz, 75 Mw A/d Converter With Input Multiplexer And Sample/hold
• Manufacturer: National Semiconductor Corporation

Figures 1 and 2 Multiplexer setup and hold times with re-
Applications Information
3 0 ANALOG MULTIPLEXER
The ADC12062 has an input multiplexer that is controlled by
the logic level on pin S0 when EOC goes low as shown in
spect to the S H input can be determined by these two
equations
t
Note that t
that the data on S0 must become valid within 10 ns after
S H goes low in order to meet the setup time requirements
S0 must be valid for a length of
Table I shows how the input channels are assigned
The output of the multiplexer is available to the user via the
MUX OUT pin This output allows the user to perform addi-
tional signal processing such as filtering or gain before the
MS (wrt S H)
t
MH (wrt S H)
(t
MH
a
MS (wrt S H)
t
e
EOC (max)
e
t
TABLE I ADC12062 Input
Multiplexer Programming
MS
t
MH
b
a
S0
)
0
1
is a negative number this indicates
b
t
EOC (min)
t
EOC (max)
(t
MS
Channel
V
V
b
IN1
IN2
t
FIGURE 10 Reference Ladder Force and Sense Inputs
EOC (min)
e
e
50
50
a
b
(Continued)
)
125
60
e
185 ns
e
e b
175 ns
10 ns
14
signal is returned to the ADC IN input and digitized If no
additional signal processing is required the MUX OUT pin
should be tied directly to the ADC IN pin
See Section 9 0 (APPLICATIONS) for a simple circuit that
will alternate between the two inputs while converting at full
speed
4 0 REFERENCE INPUTS
In addition to the fully differential V
ence inputs used on most National Semiconductor ADCs
the ADC12062 has two sense outputs for precision control
of the ladder voltage These sense inputs compensate for
errors due to IR drops between the reference source and
the ladder itself The resistance of the reference ladder is
typically 750X The parasitic resistance (R
leads bond wires PCB traces etc can easily be 0 5X to
1 0X or more This may not be significant at 8-bit or 10-bit
resolutions but at 12 bits it can introduce voltage drops
causing offset and gain errors as large as 6 LSBs
The ADC12062 provides a means to eliminate this error by
bringing out two additional pins that sense the exact voltage
at the top and bottom of the ladder With the addition of two
op amps the voltages on these internal nodes can be
forced to the exact value desired as shown in Figure 10
REF
a
and V
P
) of the package
TL H 11490 – 20
REF
b
refer-