adc12062biv National Semiconductor Corporation, adc12062biv Datasheet - Page 4
![no-image](/images/no-image-200.jpg)
adc12062biv
Manufacturer Part Number
adc12062biv
Description
12-bit, 1 Mhz, 75 Mw A/d Converter With Input Multiplexer And Sample/hold
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC12062BIV.pdf
(20 pages)
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
AC Electrical Characteristics
V
for T
Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is
functional These ratings do not guarantee specific performance limits however For guaranteed specifications and test conditions see the Electrical Characteris-
tics The guaranteed specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not operated under
the listed test conditions
Note 2 All voltages are measured with respect to GND (GND
Note 3 When the input voltage (V
limited to 25 mA or less The 50 mA package input current limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to
two
Note 4 The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
(PLCC) package is 55 C W i
conditions
s
CONV
AD
S H
EOC
ACC
1H
INTH
INTL
UPDATE
MS
MH
CSS
CSH
WU
REF
t
0H
a
A
(SENSE)
e
T
J
Maximum Sampling Rate
(1 t
Conversion Time
(S H Low to EOC High)
Aperture Delay
(S H Low to Input Voltage Held)
S H Pulse Width
S H Low to EOC Low
Access Time
(RD Low or OE High to Data Valid)
TRI-STATE Control
(RD High or OE Low to Databus TRI-STATE)
Delay from RD Low to INT High
Delay from EOC High to INT Low
EOC High to New Data Valid
Multiplexer Address Setup Time
(MUX Address Valid to EOC Low)
Multiplexer Address Hold Time
(EOC Low to MUX Address Invalid)
CS Setup Time
(CS Low to RD Low S H Low or OE High)
CS Hold Time
(CS High after RD High S H High or OE Low)
Wake-Up Time
(PD High to First S H Low)
from T
e a
THROUGHPUT
4 096V V
MIN
JA
for the VF (PQFP) package is 62 C W In most cases the maximum derated power dissipation will be reached only during fault
to T
IN
) at any pin exceeds the power supply rails (V
)
Parameter
REF
MAX
b
(SENSE)
all other limits T
D
e
(T
e
JMAX
AGND and f
b
e
T
AGND
A
The following specifications apply for DV
A
) i
e
JA
e
or the number given in the Absolute Maximum Ratings whichever is lower i
T
DGND) unless otherwise specified
J
s
e a
e
4
C
R
C
C
L
L
L
L
1 MHz unless otherwise specified Boldface limits apply
IN k
e
e
e
e
25 C
Conditions
100 pF
1k C
100 pF
100 pF
GND or V
L
e
IN l
10 pF
JMAX
V
CC
) the absolute value of current at that pin should be
i
JA
and the ambient temperature T
(Note 7)
b
Typ
740
20
95
10
25
35
5
1
25
CC
(Note 8)
e
Limit
b
b
600
980
550
125
60
20
40
60
15
50
50
20
20
1
5
35
10
AV
CC
A
The maximum
e
MHz (min)
JA
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
Units
for the V
ns
ms
a
5V