adc12d040civsx National Semiconductor Corporation, adc12d040civsx Datasheet - Page 16

• Manufacturer Part Number: adc12d040civsx
• Description: Dual 12-bit, 40 Msps, 600 Mw A/d Converter With Internal/external Reference And Sample-and-hold
• Manufacturer: National Semiconductor Corporation

www.national.com
Applications Information
Where dev is the angular difference between the two signals
having a 180˚ relative phase relationship to each other (see
Figure 3). Drive the analog inputs with a source impedance
less than 100Ω.
1.3.1 Single-Ended Operation
Single-ended performance is lower than with differential in-
put signals. For this reason, single-ended operation is not
recommended. However, if single ended-operation is re-
TABLE 2. Input to Output Relationship – Single-Ended
TABLE 1. Input to Output Relationship – Differential
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
FIGURE 3. Angular Errors Between the Two Input
V
V
V
V
REF
REF
REF
REF
REF
REF/4
CM
CM
CM
CM
CM
CM
CM
CM
Signals Will Reduce the Output Level or Cause
REF
REF
CM
CM
IN +
IN +
/2
/4
/2
/2
/2
−
−
+
+
−
−
+
+
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
REF
REF
REF
REF
CM
CM
CM
CM
IN
CM
CM
CM
CM
CM
CM
IN −
−
/2
/4
/4
/2
+
+
−
−
0000 0000 0000
0100 0000 0000
1000 0000 0000
0000 0000 0000
0100 0000 0000
1000 0000 0000
1100 0000 0000
1100 0000 0000
Binary Output
1111 1111 1111
Binary Output
1111 1111 1111
Distortion
Input
Input
20046012
2’s Complement
2’s Complement
1000 0000 0000
0000 0000 0000
0100 0000 0000
1000 0000 0000
0000 0000 0000
0100 0000 0000
1100 0000 0000
1100 0000 0000
0111 1111 1111
0111 1111 1111
(Continued)
Output
Output
16
quired and the resulting performance degradation is accept-
able, one of the analog inputs should be connected to the
d.c. mid point voltage of the driven input. The peak-to-peak
differential input signal should be twice the reference voltage
to maximize SNR and SINAD performance (Figure 2b).
For example, set V
V
Because very large input signal swings can degrade distor-
tion performance, better performance with a single-ended
input can be obtained by reducing the reference voltage
when maintaining a full-range output. Table 1 and Table 2
indicate the input to output relationship of the ADC12D040.
1.3.2 Driving the Analog Input
The V
an analog switch followed by a switched-capacitor amplifier.
The capacitance seen at the analog input pins changes with
the clock level, appearing as 8 pF when the clock is low, and
7 pF when the clock is high.
As the internal sampling switch opens and closes, current
pulses occur at the analog input pins, resulting in voltage
spikes at the signal input pins. As a driving amplifier attempts
to counteract these voltage spikes, a damped oscillation
may appear at the ADC analog inputs. The best amplifiers
for driving the ADC12D040 input pins must be able to react
to these spikes and settle before the switch opens and
another sample is taken. The LMH6702 LMH6628 and the
LMH6622, LMH6655 are good amplifiers for driving the
ADC12D040.
To help isolate the pulses at the ADC input from the amplifier
output, use RCs at the inputs, as can be seen in Figure 4
and Figure 5. These components should be placed close to
the ADC inputs because the input pins of the ADC is the
most sensitive part of the system and this is the last oppor-
tunity to filter that input.
For Nyquist applications the RC pole should be at the ADC
sample rate. The ADC input capacitance in the sample mode
should be considered when setting the RC pole. Setting the
pole in this manner will provide best SNR performance.
To obtain best SINAD and ENOB performance, reduce the
RC time constant until SNR and THD are numerically equal
to each other. To obtain best distortion and SFDR perfor-
mance, eliminate the RC altogether.
For undersampling applications, RC pole should be set at
about 1.5 to 2 times the maximum input frequency to main-
tain a linear delay response.
Note that the ADC12DL040 is not designed to operate with
single-ended inputs. However, doing so is possible if the
degraded performance is acceptable. See Section 1.3.1.
Figure 4 shows a narrow band application with a transformer
used to convert single-ended input signals to differential.
Figure 5 shows the use of a fully differential amplifier for
single-ended to differential conversion.
IN
+ with a signal range of 1.5V to 3.5V.
IN
+ and the V
REF
IN
− inputs of the ADC12D040 consist of
to 1.0V, bias V
IN
− to 2.5V and drive