adc14161 National Semiconductor Corporation, adc14161 Datasheet - Page 4

• Manufacturer Part Number: adc14161
• Description: Low-distortion, Self-calibrating 14-bit, 2.5 Msps, 390 Mw A/d Converter
• Manufacturer: National Semiconductor Corporation

www.national.com
Analog Power
23-32
35-38
Pin Descriptions and Equivalent Circuits
6, 7,
5, 8,
11
40
18
44
17
45
46
RESET
D00-13
AGND
EOC
CAL
RD
PD
V
A
CAL is a level-sensitive digital input that, when pulsed high for at least two
clock cycles, puts the ADC into the CALIBRATE mode. Calibration should
be performed upon ADC power-up (after asserting a reset) and each time
the temperature changes by more than 50˚C since the ADC14161 was last
calibrated. See Section 2.3 for more information.
RESET is a level-sensitive digital input that, when pulsed high for at least 2
CLOCK cycles, results in the resetting of the ADC. This reset pulse must
be applied after ADC power-up, before calibration.
RD is the (READ) digital input that, when low, enables the output data
buffers. When this input pin is high, the output data bus is in a high
impedance state.
PD is the Power Down input that, when low, puts the converter into the
power down mode. When this pin is high, the converter is in the active
mode.
EOC is a digital output that, when low, indicates the availability of new
conversion results at the data output pins.
Digital data outputs that make up the 14-bit TRI-STATE conversion results.
D00 is the LSB, while D13 is the MSB (SIGN bit) of the two’s complement
output word.
Positive analog supply pins. These pins should be connected to a clean,
quiet +5V source and bypassed to AGND with 0.1 µF monolithic capacitors
in parallel with 10 µF capacitors, both located within 1 cm of these power
pins.
The ground return for the analog supply. AGND and DGND should be
connected together directly beneath the ADC14161 package. See Section
5 (Layout and grounding) for more details).
4
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