cs5460 Cirrus Logic, Inc., cs5460 Datasheet - Page 7

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cs5460

Manufacturer Part Number
cs5460
Description
Single Phase Bi-directional Power/energy Ic
Manufacturer
Cirrus Logic, Inc.
Datasheet

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SWITCHING CHARACTERISTICS
or 5.0 V ±10%; VA- = 0.0 V; Logic Levels: Logic 0 = 0.0 V, Logic 1 = VD+; CL = 50pF))
Notes: 14. Device parameters are specified with a 4.096 MHz clock, however, clocks between 3MHz to 20 MHz
DS279PP5
Master Clock Frequency
Master Clock Duty Cycle
CPUCLK Duty Cycle
Rise Times
Fall Times
Start-up
Oscillator Start-up Time
Serial Port Timing
Serial Clock Frequency
Serial Clock
SDI Write Timing
CS Enable to Valid Latch Clock
Data Set-up Time Prior to SCLK Rising
Data Hold Time After SCLK Rising
SCLK Falling Prior to CS Disable
SDO Read Timing
CS Enable to Valid Latch Clock
SCLK Falling to New Data Bit
CS Rising to SDO Hi-Z
15. If external MCLK is used, then its duty cycle must be between 45% and 55% to maintain this spec.
16. Specified using 10% and 90% points on wave-form of interest. Output loaded with 50 pF.
17. Oscillator start-up time varies with crystal parameters. This specification does not apply when using an
can be used.
external clock source.
Any Digital Input Except SCLK (Note 16)
Any Digital Input Except SCLK (Note 16)
Parameter
Internal Gate Oscillator (Note 14)
XTAL = 4.096 MHz (Note 17)
Any Digital Output
Any Digital Output
Pulse Width High
Pulse Width Low
(T
A
(Note 15)
= -40 °C to +85 °C; VA+ = 5.0 V ±10%; VD+ = 3.0 V ±10%
SCLK
SCLK
Symbol
MCLK
SCLK
t
t
t
rise
fall
ost
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
Min
200
200
100
100
2.5
40
40
50
50
-
-
-
-
-
-
-
-
-
-
-
4.096
Typ
50
50
60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
100
100
150
150
150
1.0
1.0
20
60
60
2
-
-
-
-
-
-
-
-
-
CS5460
MHz
MHz
Unit
ms
µs
µs
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
7

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