tda8004t-c1 NXP Semiconductors, tda8004t-c1 Datasheet - Page 9

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tda8004t-c1

Manufacturer Part Number
tda8004t-c1
Description
Ic Card Interface
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
TDA8004T_4
Product data sheet
8.7 Active state
In the timing informations above and below, T is 64 times the period of the internal
oscillator, about 25 s.
The clock may be applied to the card in the following way:
If this feature is not needed, then CMDVCC may be set LOW with RSTIN LOW. In this
case, CLK will start at t
To Request (ATR) from the card.
When the activation sequence is completed, the TDA8004T will be in the active state.
Data is exchanged between the card and the microcontroller via the I/O lines. The
TDA8004T is designed for cards without V
erase the internal non-volatile memory).
Depending on the layout and on the application test conditions (for example with an
additional 1 pF cross capacitance between C2/C3 and C2/C7) it is possible that C2 is
polluted with high frequency noise from C3. In this case, it will be necessary to connect a
220 pF capacitance between C2 and CGND.
It is recommended to:
1. Keep track C3 as far as possible from other tracks
Fig 5. Activation sequence
I/O, AUX1 and AUX2 are enabled (t
CLK is applied to the C3 contact (t
RST is enabled (t
Set RSTIN HIGH before setting CMDVCC LOW and reset it LOW between t
CLK will start at this moment. RST will remain LOW until t
be the copy of RSTIN. After t
precise count of CLK pulses before toggling RST.
OSC_INT/64
(T
CMDVCC
RSTIN
25 s)
VUP
RST
V
CLK
I/O
CC
Rev. 04 — 20 February 2006
5
= t
3
and after t
1
t
t
1
0
+ 7T)
5
, RSTIN has no further action on CLK. This is to allow a
t
2
5
, RSTIN may be set HIGH in order to get the Answer
4
)
3
= t
PP
high - Z
1
t
(this is the voltage required to program or
+ 4T)
act
t
3
t
4
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
5
, where RST is enabled to
t
5
TDA8004T
IC card interface
ATR
mgm177
3
and t
9 of 26
5
;

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