tda8315t NXP Semiconductors, tda8315t Datasheet - Page 10

• Manufacturer Part Number: tda8315t
• Description: Integrated Ntsc Decoder And Sync Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes to the characteristics
1. Signal with negative-going sync. Amplitude includes sync pulse amplitude.
2. This parameter is not tested during production and is guaranteed by the design and qualified by matrix batches which
3. Burst amplitude; for a colour bar with 75% saturation the chrominance signal amplitude is 660 mV (p-p).
4. This parameter is not tested during production and is just given as application information for the designer of the
5. The signal-to-noise ratio is specified as a peak-to-peak signal with respect to RMS noise (bandwidth 5 MHz).
6. At a chrominance input voltage of 660 mV (p-p) (colour bar with 75% saturation i.e. burst signal amplitude
7. All frequency variations are referenced to 3.58 MHz carrier frequency.
8. This value indicates the bandwidth of the complete chrominance circuit including the chrominance bandpass filter.
9. Output signal amplitude for a standard colour bar signal with 75% saturation and a demodulation angle of 90 . For a
10. Slicing level independent of sync pulse amplitude. The slicing level of the vertical sync separator is 70% (slicing level
11. The horizontal and vertical sync are stable while processing Copy Guard signals and signals with phase shifted sync
12. To obtain a good performance for both weak signal and VCR playback the time constant of the first control loop is
September 1994
Integrated NTSC decoder
and sync processor
are made in the pilot production period.
television receiver.
300 mV (p-p)) the dynamic range of the ACC is +6 and 18 dB.
All oscillator specifications are measured with the Philips crystal series 9922 520.
If the spurious response of the crystal is lower than 3 dB with respect to the fundamental frequency for a damping
resistance of 1.5 k , oscillation at the fundamental frequency is guaranteed.
The catching and detuning range are measured for nominal crystal parameters. These are:
a) load resonance frequency f
b) motional capacitance C
c) parallel capacitance C
The actual load capacitance in the application should be C
and off chip.
The free-running frequency of the oscillator can be checked by pulling the saturation control pin to the positive supply
rail. In that condition the colour killer is not active so that the frequency offset is visible on the screen.
The bandwidth of the demodulator low-pass filter is approximately 1 MHz.
demodulation angle of 110 the V signal amplitude will decrease to 1.2 V (p-p) and the U signal amplitude remains
unchanged. The nominal saturation is specified as maximum 6 dB.
in direction of black level) during strong signal reception (no noise detected in the incoming signal) and 30% during
weak signal reception.
pulses (stretched tapes). Trick mode conditions of the VCR will also not disturb the synchronization. The value given
is the delay caused by the vertical sync pulse integrator. The integrator has been designed such that the vertical sync
is not disturbed for special anti-copy tapes with vertical sync pulses with an on/off time of 10/22 s.
switched depending on the input signal condition. Therefore the circuit contains a noise detector and the time
constant is switched to ‘slow’ when excessive noise is present in the signal. In the ‘fast’ mode during the vertical
retrace time the phase detector current is increased 50% so that phase errors due to head-switching of the VCR are
corrected as soon as possible.
To prevent the horizontal synchronization being disturbed by anti-copy guard signals such as Macrovision the phase
detector is gated during the vertical retrace period so that pulses during scan have no effect on the output voltage.
The width of the gate pulse is approximately 12 s. during weak signal conditions (noise detector active) the gating
is active during the complete scan period and the width of the gate pulse is reduced to 5.7 s so that the effect of the
noise is reduced to a minimum.
The output current of the phase detector in the two modes is shown in Table 1.
0
M
= 4.5 pF.
= 14.5 fF
0
(C
L
= 20 pF) = 3.579545 MHz
10
L
= 18 pF to account for parasitic capacitances on
Preliminary specification
TDA8315T