tda8295 NXP Semiconductors, tda8295 Datasheet - Page 44

• Manufacturer Part Number: tda8295
• Description: Tda8295 Digital Global Standard Low If Demodulator For Analog Tv And Fm Radio
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA8295_1
Product data sheet
9.3.18 Video and sound DAC control
Table 52.
Legend: * = default value.
The TDA8295 implements two 10-bit DAC modules (CVBS and sound outputs) which are
sampled by a 108 MHz clock. A reference module derives biasing currents for the two
DACs.
Table 53.
Legend: * = default value.
Table 54.
Legend: * = default value.
Bit
7 to 2 -
1
0
Bit
7
6 to 1 B_DA_V[5:0] R/W
0
Bit
7
6 to 1 B_DA_S[5:0] R/W
0
Symbol
AD_PLL_BYP R/W
AD_SR54M
Symbol
-
PD_DA_V
Symbol
-
PD_DA_S
ADC_CTL_2 register (address 34h) bit description
VIDEODAC_CTL register (address 35h) bit description
AUDIODAC_CTL register (address 36h) bit description
Digital global standard low IF demodulator for analog TV and FM radio
Access Value
R/W
R/W
Access Value
R/W
R/W
Access Value
R/W
R/W
Rev. 01 — 4 February 2008
0
00 0000
11 1111*
0*
1
0
00 0000*
11 1111
0*
1
-
0*
1
0
1*
Description
not used
The clock PLL can be bypassed for the ADC sampling
clock. Then the crystal output is directly taken for ADC
sampling.
AD_SR54M sets the ADC sampling rate
Description
reserved, must be set to logic 0
B_DA_V is the coarse output level adjustment
parameters of the video DAC. See
When HIGH, PD_DA_V sets the video DAC into its
Power-down mode.
Description
reserved, must be set to logic 0
B_DA_S is the coarse output level adjustment
parameters of the sound DAC. See
When HIGH, PD_DA_S sets the sound DAC into its
Power-down mode.
Normal mode
Bypass mode
ADC sampling rate 27 MHz; first decimation filter is
bypassed
ADC sampling rate 54 MHz
minimum current setting
maximum current setting
Normal mode
video DAC Power-down mode
minimum current setting
maximum current setting
Normal mode
sound DAC Power-down mode
Section
TDA8295
Section
© NXP B.V. 2008. All rights reserved.
13.3.
13.3.
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