kad5512p-21 ETC-unknow, kad5512p-21 Datasheet - Page 25

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kad5512p-21

Manufacturer Part Number
kad5512p-21
Description
12-bit, 500msps A/d Converter
Manufacturer
ETC-unknow
Datasheet
Equivalent Circuits
Rev 0.5.1 Preliminary
KAD5512P-50
CLKN
CLKP
Figure 48. Tri-Level Digital Inputs
AVDD
AVDD
Figure 46. Analog Inputs
Figure 49. Digital Inputs
Figure 47. Clock Inputs
11k»
11k»
AVDD
18k»
18k»
AVDD
Pipeline
Charge
To
Layout Considerations
Split Ground and Power Planes
Data converters operating at high sampling frequen-
cies require extra care in PC board layout. Many
complex board designs benefit from isolating the
analog and digital sections. Analog supply and
ground planes should be laid out under signal and
clock inputs. Locate the digital planes under outputs
and logic pins. Grounds should be joined under the
chip.
Clock Input Considerations
Use matched transmission lines to the transformer in-
puts for the analog input and clock signals. Locate
transformers and terminations as close to the chip as
possible.
Figure 52. VCM_OUT Output
Figure 51. CMOS Outputs
Figure 50. LVDS Outputs
Page 25

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