pca9574 NXP Semiconductors, pca9574 Datasheet
pca9574
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pca9574 Summary of contents
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... PCA9574 has built-in level shifting feature that makes these devices extremely flexible in mixed signal environments where communication between incompatible I/Os is required. The core of PCA9574 can operate at a voltage as low as 1.1 V while the I/O bank can operate in the range 1 3.6 V. Bus hold with programmable on-chip pull-up or pull-down feature for I/Os is also provided ...
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... NXP Semiconductors The PCA9574 is available in 16-pin TSSOP and HVQFN packages and is specified over the +85 C industrial temperature range. 2. Features I 400 kHz I I Compliant with I I Separate supply rails for core logic and I/O bank provides voltage level shifting I 1 3.6 V operation with level shifting feature and 3.6 V tolerant I Very low standby current: < ...
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... P74 T amb PCA9574 INPUT 2 I C-BUS/SMBus FILTER POWER-ON RESET Remark: All I/Os are set to inputs at power-up and RESET. Block diagram of PCA9574 Rev. 01 — 15 May 2008 PCA9574 +85 C 8-bit INPUT/ OUTPUT CONTROL PORTS write pulse read pulse ...
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... CK output port register input port register DD(IO) 100 k polarity inversion register Rev. 01 — 15 May 2008 PCA9574 output port register data V DD(IO ESD protection diode V SS input port register data INTERRUPT to INT MASK polarity inversion register data 002aad066 © ...
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... power supply Rev. 01 — 15 May 2008 PCA9574 PCA9574BS terminal 1 index area 1 RESET Transparent top view Fig 4. Pin configuration for HVQFN16 Description active LOW interrupt output; active LOW SMBus alert output address input ...
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... Command register Following the successful acknowledgement of the slave address + R/W bit, the bus master will send a byte to the PCA9574, which will be stored in the Command register. Fig 6. The lowest 3 bits are used as a pointer to determine which register will be accessed. Only a command register code with the 3 least signifi ...
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... Each 8-bit register may be updated independently of the other registers. 7.5 Reading the port registers In order to read data from the PCA9574, the bus master must first send the PCA9574 address with the least significant bit set to a logic 0 (see command byte is sent after the address and determines which register will be accessed. ...
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... R/W X E0.1 R/W 0* E0.0 R/W 0* Rev. 01 — 15 May 2008 PCA9574 Description inverts polarity of Input port register data 0 = Input port register data retained (default value Input port register data inverted Description not used allows the user to enable/disable pull-up/pull-downs on the I/O pins 0 = disables pull-up/pull-downs on the I/O pins and ...
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... I/O pin 1 = selects a 100 k pull-up resistor for that I/O pin (default value) Description configures the direction of the I/O pins 0 = corresponding port pin enabled as an output 1 = corresponding port pin configured as input (default value) PCA9574 © NXP B.V. 2008. All rights reserved ...
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... S0.2 read only 0* S0.1 read only 0* S0.0 read only 0* Rev. 01 — 15 May 2008 PCA9574 Description reflects outgoing logic levels of pins defined as outputs by Register 4 Description enable or disable interrupts 0 = enable interrupt 1 = disable interrupt (default value) Description identifies source of interrupt © NXP B.V. 2008. All rights reserved. ...
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... Once the General Call address has been sent and acknowledged, the master sends 1 byte. The value of the byte must be equal to 06h.The PCA9574 acknowledges this value only. If the byte is not equal to 06h, the PCA9574 does not acknowledge it. If more than 1 byte of data is sent, the PCA9574 does not acknowledge anymore. ...
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... Input port register. Only a read of the Input port register that contains the bit(s) image of the input(s) that generated the interrupt clears the interrupt condition. 7.10 Standby The PCA9574 goes into standby when the I than 1.0 A (typical). 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules ...
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... SCL from master 1 S START condition 2 C-bus Rev. 01 — 15 May 2008 9). MASTER MASTER TRANSMITTER/ MULTIPLEXER RECEIVER SLAVE not acknowledge acknowledge 2 8 clock pulse for acknowledgement PCA9574 2 I C-BUS 002aaa966 9 002aaa987 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 9. Bus transactions Data is transmitted to the PCA9574 registers using ‘Write Byte’ transfers (see and Figure Data is read from the PCA9574 registers using ‘Read Byte’ transfers (see Figure 14). SCL slave address SDA START condition ...
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... DATA 1 R/W acknowledge from slave Rev. 01 — 15 May 2008 PCA9574 (cont.) A data from register A DATA (last byte) no acknowledge from master DATA 4 data from port A DATA 4 acknowledge from master © NXP B.V. 2008. All rights reserved. ...
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... V Limiting values Parameter Conditions supply voltage input/output supply voltage input/output current input current supply current ground supply current total power dissipation storage temperature ambient temperature Rev. 01 — 15 May 2008 PCA9574 V = 3.6 V DD(IO) SUBSYSTEM 4 (e.g., RF module) V DD(IO) CTRL SUBSYSTEM 1 P0 (e.g., temp. sensor) INT P1 P2 ...
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... 0 1 DD( DD( DD( DD(IO 3 DD(IO) I DD(IO 3 DD( Rev. 01 — 15 May 2008 PCA9574 Min Typ Max 1.1 - 3.6 1.1 - 3.6 - 135 200 - 0. 0. 0.8 1.0 DD 0.5 - +0.3V 0. 0.5 - +0.3V 0.7V - 3.6 ...
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... C-bus and SMBus, level translating, low voltage GPIO = +85 C; unless otherwise specified. SS amb Conditions Standard-mode 2 I Min 0 4.7 4.0 4.7 4.0 [1] 0.3 0 [2] 300 250 4.7 4 150 Figure 17 - Figure 17 - Rev. 01 — 15 May 2008 PCA9574 2 Fast-mode I C-bus C-bus Max Min Max 100 0 400 - 0.6 - 3.45 0.1 0 100 - - 1 ...
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... C-bus and SMBus, level translating, low voltage GPIO HD;DAT HIGH SU;DAT PULSE DUT GENERATOR R T Rev. 01 — 15 May 2008 PCA9574 t t HD;STA SU;STA SU;STO Sr ACK or read cycle t rst w(rst) t rst 50 % output off 2V DD ...
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... REFERENCES JEDEC JEITA MO-153 Rev. 01 — 15 May 2008 detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION PCA9574 SOT403 ( 0.40 8 0.1 o 0.06 0 ISSUE DATE 99-12-27 03-02-18 © NXP B.V. 2008. All rights reserved ...
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... 2.5 scale (1) ( 3.1 1.75 3.1 1.75 0.5 1.5 2.9 1.45 2.9 1.45 REFERENCES JEDEC JEITA MO-220 - - - Rev. 01 — 15 May 2008 detail 0.5 0.05 0.1 1.5 0.1 0.05 0.3 EUROPEAN PROJECTION PCA9574 SOT758 ISSUE DATE 02-03-25 02-10-21 © NXP B.V. 2008. All rights reserved ...
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... Inspection and repair • Lead-free soldering versus SnPb soldering 17.3 Wave soldering Key characteristics in wave soldering are: PCA9574_1 Product data sheet 2 8-bit I C-bus and SMBus, level translating, low voltage GPIO Rev. 01 — 15 May 2008 PCA9574 © NXP B.V. 2008. All rights reserved ...
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... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 21. Rev. 01 — 15 May 2008 PCA9574 Figure 21) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © NXP B.V. 2008. All rights reserved. ...
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... Inter-Integrated Circuit bus Integrated Circuit Light Emitting Diode Low Pass Machine Model Printed-Circuit Board Programmable Logic Controller Power-On Reset Redundant Array of Independent Discs System Management Bus Rev. 01 — 15 May 2008 PCA9574 peak temperature time 001aac844 © NXP B.V. 2008. All rights reserved ...
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... Revision history Document ID Release date PCA9574_1 20080515 PCA9574_1 Product data sheet 2 8-bit I C-bus and SMBus, level translating, low voltage GPIO Data sheet status Change notice Product data sheet - Rev. 01 — 15 May 2008 PCA9574 Supersedes - © NXP B.V. 2008. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 15 May 2008 PCA9574 © NXP B.V. 2008. All rights reserved ...
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... For sales office addresses, please send an email to: salesaddresses@nxp.com PCA9574 Wave and reflow soldering . . . . . . . . . . . . . . . 22 Wave soldering Reflow soldering Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . 25 Legal information . . . . . . . . . . . . . . . . . . . . . . 26 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 26 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Disclaimers Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Contact information . . . . . . . . . . . . . . . . . . . . 26 Contents Date of release: 15 May 2008 Document identifier: PCA9574_1 All rights reserved. ...