pca9701 NXP Semiconductors, pca9701 Datasheet - Page 6

• Manufacturer Part Number: pca9701
• Description: Pca9701; Pca9702 18 V Tolerant Spi 16-bit/8-bit Gpi With
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9701_PCA9702_2
Product data sheet
Fig 6. Register access timing
input status
DATA[n:0] is data on the input pins, IN[n:0].
For 8-bit GPI (PCA9702), n = 7; for 16-bit GPI (PCA9701), n = 15.
Shaded areas indicate active but invalid data.
SDOUT
register
register
SCLK
SDIN
shift
CS
7.1.5 Register access timing
7.2 Interrupt output
high-impedance
Figure 6
LOW. On the falling edge of CS, input port status, DATA[n:0] is captured into the input
status register, and subsequently the first rising edge of SCLK parallel loads the shift
register. The falling edge of SCLK samples the data on the SDIN. The MSB from the shift
register is valid and available on the SDOUT after the first rising edge of SCLK.
INT is the open-drain interrupt output and is active LOW. A pull-up resistor of
approximately 10 k is recommended. The interrupt output is asserted when the input
status is changed, and is cleared on the falling edge of CS or when the input port status
matches the input status register. When there are multiple devices, the INT outputs may
be tied together to a single pull-up.
Table 3
input status register. The interrupt output is asserted when the input port and input status
register differ.
illustrates the state of the interrupt output versus the state of the input port and
shows the waveforms of the device operation. Initially CS is HIGH and SCLK is
DATA[n:0]
MSB out
sample
MSB in
SDIN
Rev. 02 — 29 August 2007
DATA[n:0]
MSB
MSB
1 out
1 in
18 V tolerant SPI 16-bit/8-bit GPI with INT
PCA9701; PCA9702
LSB out
LSB in
© NXP B.V. 2007. All rights reserved.
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