tda9898hn/v2 NXP Semiconductors, tda9898hn/v2 Datasheet - Page 30

• Manufacturer Part Number: tda9898hn/v2
• Description: Tda9897; Tda9898 Multistandard Hybrid If Processing
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA9897_TDA9898_3
Product data sheet
Table 32.
Table 33.
Table 34.
[1]
Bit
RADIO
W1[7]
X
X
X
0
1
Bit
7 and 6
5 to 0
FSFREQ1 FSFREQ0
For bit description of TV1 and TV2 see
7
Output mode at pin MPP2 for ATV; dual or radio mode
W5 - data write register bit allocation
W5 - data write register bit description
MPP2S1
W4[5]
0
0
1
1
1
Symbol
FSFREQ[1:0]
SFREQ[5:0]
6
Rev. 03 — 11 January 2008
MPP2S0
W4[4]
0
1
0
1
1
SFREQ5
5
Description
DTV filter or sound trap selection for video
synthesizer frequencies; see
ATV; sound trap; TV2 = 1
00 = M/N standard (4.5 MHz)
01 = B/G standard (5.5 MHz)
10 = I standard (6.0 MHz)
11 = D/K and L/L-accent standard (6.5 MHz)
DTV (zero IF); low-pass cut-off frequency; TV2 = 0 and TV1 = 0
00 = 3.0 MHz
01 = 3.5 MHz
10 = 4.0 MHz
11 = not used
DTV (low IF); upper BP cut-off frequency; TV2 = 0 and TV1 = 1
00 = 7.0 MHz
01 = 8.0 MHz
10 = 9.0 MHz
11 = not used
Pin MPP2 output mode
gain control voltage of FM PLL
gain control voltage of SIF amplifier
TAGC monitor voltage
AFC current output, VIF PLL
AFC current output, radio mode
SFREQ4
Table 16
4
W1[3] and W1[4] and
SFREQ3
[1]
TDA9897; TDA9898
3
Multistandard hybrid IF processing
Table 35
SFREQ2
Table
2
and
17.
Table 36
SFREQ1
© NXP B.V. 2008. All rights reserved.
1
SFREQ0
30 of 103
0