tda9898hn/v2 NXP Semiconductors, tda9898hn/v2 Datasheet - Page 34
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tda9898hn/v2
Manufacturer Part Number
tda9898hn/v2
Description
Tda9897; Tda9898 Multistandard Hybrid If Processing
Manufacturer
NXP Semiconductors
Datasheet
1.TDA9898HNV2.pdf
(103 pages)
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TDA9897_TDA9898_3
Product data sheet
Table 40.
Table 41.
[1]
Table 42.
Table 43.
Bit
7 and 6
5
4
3
2
1
0
Bit
7 to 4
3 to 0
At internal Nyquist processing off (W7[0] = 1) it is mandatory to set the internal video level bit VIDLEVEL to
normal (W7[4] = 0).
7
0
7
0
W7 - data write register bit allocation
W7 - data write register bit description
W8 - data write register bit allocation
W8 - data write register bit description
Symbol
-
EASY[3:0]
Symbol
-
SIFLEVEL SIF level reduction
VIDLEVEL video level reduction
OPSTATE
PORT
FILOUTBP external filter output signal source; see
NYQOFF
6
0
6
0
Rev. 03 — 11 January 2008
Description
0 = fixed value
easy setting; see
Description
0 = fixed value
output state; PORT = 1
port or VIF AGC monitor
internal Nyquist processing
SIFLEVEL VIDLEVEL OPSTATE
1 = internal SIF level is reduced by 6 dB (only for AM sound)
0 = internal SIF level is normal
1 = internal video level is reduced by 6 dB
0 = internal video level is normal
1 = output port is HIGH (external pull-up resistor needed)
0 = output port is LOW
1 = pin MPP1 is logic output port; level depends on OPSTATE
0 = pin MPP1 is VIF AGC monitor output; independent on OPSTATE
1 = signal for external filter is obtained behind internal BP filter
0 = signal for external filter is obtained behind SIF mixer
1 = internal Nyquist processing off
0 = internal Nyquist processing on
5
0
5
4
0
Table 44
4
EASY3
TDA9897; TDA9898
3
3
Multistandard hybrid IF processing
[1]
EASY2
Figure 9
PORT
2
2
FILOUTBP NYQOFF
EASY1
© NXP B.V. 2008. All rights reserved.
1
1
EASY0
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0
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