tda9150b NXP Semiconductors, tda9150b Datasheet - Page 6

• Manufacturer Part Number: tda9150b
• Description: Programmable Deflection Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
I
Slave address: 8C HEX = 1000110X BIN
READ MODE
The format of the status byte is: PON PROT 0 0 0 0 0 0
Where:
PON is the status bit for power-on reset (POR) and after
power failure:
Table 1 Write mode with auto increment; subaddress and data byte format.
Notes
1. X = don’t care.
2. Data bit used in another function.
July 1994
2
Vertical amplitude
Vertical S-correction
Vertical start scan
Vertical off-centre shift
EW trapezium correction
EW width/width ratio
EW parabola/width ratio
EW corner/parabola ratio
EHT compensation
Horizontal phase
Horizontal off-centre shift
Clamp shift
Control 1
Control 2
C-bus commands
Logic 1:
– after the first POR and after power failure; also set to
– POR 1 to 0 transition, V
– POR 0 to 1 transition, V
Programmable deflection controller
1 after a severe voltage dip that may have disturbed
the various settings
FUNCTION
CC
CC
SUBADDRESS
= 6.25 V (typ.)
= 5.75 V (typ.)
0A
0B
0F
00
01
02
03
03
04
05
06
07
08
09
X
MS
D7
X
X
X
X
X
X
X
X
X
X
X
X
(1)
note 2
6
WS
D6
A6
X
X
X
X
X
X
X
X
X
X
X
PROT is the over voltage detection for the scaled EHT
input:
Remark: a read action is considered successful when an
End Of Data signal has been detected (i.e. no master
acknowledge).
Logic 0:
– after a successful read of the status byte.
Logic 1:
– if the scaled EHT rises above the reference value of
Logic 0:
– after a successful read of the status byte and EHT
3.9 V
note 2
3.9 V.
FBL
D5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
X
X
note 2
VPR
VAP
DATA BYTE
D4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
X
BLDS
CPR
D3
A3
A3
A3
A3
A3
A3
A3
A3
A3
X
X
X
note 2
LFSS
Preliminary specification
DIP
D2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
TDA9150B
note 2
DINT
PRD
D1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
note 2
GBS
CSU
D0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0