dac1005d650 NXP Semiconductors, dac1005d650 Datasheet - Page 35

• Manufacturer Part Number: dac1005d650
• Description: Dual 10-bit Dac, Up To 650 Msps; 2? 4? And 8? Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
DAC1005D650_1
Product data sheet
10.14.3 AC interface to an AQM
10.15 Power and grounding
The constraints to adjust the interface are the output compliance range of the DAC and
the auxiliary DACs, the input common mode level of the AQM, and the range of offset
correction required.
When the Analog Quadrature Modulator (AQM) common mode voltage is close to ground,
the DAC1005D650 must be AC-coupled and the auxiliary DACs are needed for offset
correction.
Figure 18
input level when using auxiliary DACs.
In order to obtain optimum performance, it is recommended that the 1.8 V analog power
supplies on pins 5, 11, 71, 77 and 99 should not be connected with those on pins 70, 79,
81, 83, 93, 95 and 97 on the top layer.
To optimize the decoupling, the power supplies should be decoupled with the following
pins:
Fig 19. An example of an AC interface to a 0.5 V
•
•
•
•
V
and pin 50 with 49.
V
V
79, 81, 83 with 80, 82, 84; pins 93, 95, 97 with 92, 94, 96 and pin 99 with 98.
V
DDD(1V8)
DD(IO)(3V3)
DDA(1V8)
DDA(3V3)
provides an example of a connection to an AQM with a 0.5 V common mode
: pin 5 with 4; pin 6 with 7; pin 11 with 10; pin 71 with 72; pin 77 with 78; pins
: pin 1 with 100 and pin 75 with 76.
: pin 26 with 27; pin 32 with 33; pin 36 with 37; pin 40 with 39; pin 44 with 43
IOUTnN
IOUTnP
AUXnN
AUXnP
: pin 16 with 17 and pin 60 with 59.
(1)
(1)
(2)
0 mA to 20 mA
1.1 mA (typ.)
BBP/BBN; V
IOUTnP/IOUTnN; V
Rev. 01 — 28 July 2009
66.5
Dual 10-bit DAC, up to 650 Msps; 2 4 and 8 interpolating
3.3 V
i(cm)
66.5
= 0.5 V; V
o(cm)
10 nF
10 nF
= 2.65 V; V
i(dif)(p-p)
2 k
174
34
= 1.96 V; offset correction up to 70 mV
o(dif)(p-p)
5 V
i(cm)
AQM using auxiliary DACs
2 k
174
34
= 1.96 V
DAC1005D650
BBP
BBN
AQM (V
(2)
i(cm)
001aaj589
= 0.5 V)
© NXP B.V. 2009. All rights reserved.
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