dac1408d750 NXP Semiconductors, dac1408d750 Datasheet - Page 67
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dac1408d750
Manufacturer Part Number
dac1408d750
Description
Dac1408d750 Dual 14-bit Dac; Up To 750 Msps; 2?, 4? Or 8? Interpolating With Jesd204a Interface
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1408D750.pdf
(98 pages)
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NXP Semiconductors
Table 106. REINIT_CNTRL register (address 1Ch) bit description
Default settings are shown highlighted.
Table 107. PAGE_ADDRESS register (address 1Fh) bit description
DAC1408D750
Product data sheet
Bit
3
2
1
0
Bit
2 to 0
Symbol
RESYNC_O_L_LN3
RESYNC_O_L_LN2
RESYNC_O_L_LN1
RESYNC_O_L_LN0
Symbol
PAGE[2:0]
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 December 2010
Access
R/W
R/W
R/W
R/W
Access
R/W
Value
0
1
0
1
0
1
0
1
Value
0h
2×, 4× or 8× interpolating DAC with JESD204A
…continued
Description
lane 3, resync over link
Description
page_address
lane 2, resync over link
lane 1, resync over link
lane 0, resync over link
no action
lane 3 lane controller checks for
K28.5 /K/ symbols
no action
lane 2 lane controller checks for
K28.5 /K/ symbols
no action
lane 1 lane controller checks for
K28.5 /K/ symbols
no action
lane 0 controller checks for K28.5 /K/ symbols
DAC1408D750
© NXP B.V. 2010. All rights reserved.
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