adsp-21364bbc Analog Devices, Inc., adsp-21364bbc Datasheet - Page 24

• Manufacturer Part Number: adsp-21364bbc
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
Precision Clock Generator (Direct Pin Routing)
This timing is only valid when the SRU is configured such that
the precision clock generator (PCG) takes its inputs directly
from the DAI pins (via pin buffers) and sends its outputs
directly to the DAI pins. For the other cases, where the PCG’s
Table 21. Precision Clock Generator (Direct Pin Routing)
1
Parameter
Timing Requirements
t
t
t
Switching Characteristics
t
t
t
t
D = FSxDIV, PH = FSxPHASE. For more information, see the ADSP-2136x SHARC Processor Hardware Reference, “Precision Clock Generators”
chapter.
In normal mode, t
PCGIP
STRIG
HTRIG
DPCGIO
DTRIGCLK
DTRIGFS
PCGOP
1
Input Clock Period
PCG Trigger Setup Before Falling
Edge of PCG Input Clock
PCG Trigger Hold After Falling
Edge of PCG Input Clock
PCG Output Clock and Frame Sync
Active Edge Delay After PCG Input
Clock
PCG Output Clock Delay After PCG
Trigger
PCG Frame Sync Delay After PCG
Trigger
Output Clock Period
PCGOP
(min) = 2 × t
PCG_TRIGx_I
PCG_CLKx_O
PCG_EXTx_I
PCG_FSx_O
DAI_Pn
DAI_Py
DAI_Pm
(CLKIN)
DAI_Pz
PCGIP
.
t
STRIG
Figure 16. Precision Clock Generator (Direct Pin Routing)
Min
20
4.5
3
2.5
2.5 + (2.5 × t
2.5 + ((2.5 + D – PH) × t
2 × t
PCGIP
Rev. D | Page 24 of 56 | April 2008
t
t
DTRIGCLK
– 1
DPCGIO
t
HTRIG
PCGIP
t
DTRIGFS
)
K and B Grade
PCGIP
)
inputs and outputs are not directly routed to/from DAI pins (via
pin buffers) there is no timing data available. All timing param-
eters and switching characteristics apply to external DAI pins
(DAI_P01 through DAI_P20).
t
t
PCGIP
DPCGIO
Max
10
10 + (2.5 × t
10 + ((2.5 + D – PH) × t
PCGIP
)
t
PCGOP
PCGIP
) 12 + ((2.5 + D – PH) × t
Max
10
12 + (2.5 × t
Y Grade
PCGIP
)
PCGIP
) ns
Unit
ns
ns
ns
ns
ns
ns