dsp56001a Freescale Semiconductor, Inc, dsp56001a Datasheet - Page 36

• Manufacturer Part Number: dsp56001a
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

DSP56001A
Serial Communication Interface (SCI) Timing
SERIAL COMMUNICATION INTERFACE (SCI) TIMING
V
T
t
Control Register and T
2-18
SCC
J
CC
Num
=-40 to 105 ˚C; C
55
56
57
58
59
60
61
62
63
64
65
66
= 5.0 V 10% for 27 MHz; 5.0 V 5% for 33 MHz;
= Synchronous Clock Cycle Time (For internal clock, t
Synchronous Clock Cycle
Clock Low Period
Clock High Period
< intentionally blank >
Output Data Setup to Clock
Falling Edge (Internal Clock)
Output Data Hold After Clock
Rising Edge (Internal Clock)
Input Data Setup Time Before
Clock
Rising Edge (Internal Clock)
Input Data Not Valid Before
Clock Rising Edge (Internal
Clock)
Clock Falling Edge to Output
Data Valid (External Clock)
Output Data Hold After Clock
Rising Edge (External Clock)
Input Data Setup Time Before
Clock
Rising Edge (External Clock)
Input Data Hold Time After
Clock Rising Edge (External
Clock)
Characteristics
L
Table 2-10 SCI Synchronous Mode Timing (27/33 MHz)
= 50 pF + 1 TTL loads
C.
) The minimum t
Freescale Semiconductor, Inc.
—
For More Information On This Product,
t
SCC
DSP56001A/D, Rev. 1
2 T
2 T
2 T
Go to: www.freescale.com
4 T
4 T
SCC
8 T
T
Min
C
C
C
C
—
39
11
35
—
—
23
31
C
C
+ T
+ T
+ 9
– T
– 15
– 15
value is 8 T
C
27 MHz
L
L
L
+
–
–
2 T
Max
C
—
—
—
—
—
—
48
—
—
—
—
8
+ T
SCC
C
.
L
–
is determined by the SCI Clock
2 T
2 T
2 T
4 T
4 T
T
8 T
Min
C
C
C
C
—
31
28
—
—
19
25
9
C
C
+ T
+ T
+ 8
– T
– 13
– 13
C
L
33 MHz
L
L
+
–
–
2 T
Max
C
—
—
—
—
—
—
—
39
—
—
—
MOTOROLA
6
+ T
L
–
Unit
ns
ns
ns
—
ns
ns
ns
ns
ns
ns
ns
ns