dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 42

• Manufacturer Part Number: dsp56167
• Description: Advance Information 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

Specifications
External Bus Asynchronous Timing
EXTERNAL BUS ASYNCHRONOUS TIMING
V
cyc = Clock cycle = 1/2 instruction cycle = 2 T cycles
WS = Number of Wait States, as determined by BCR (WS = 0 to 31)
WT = WS cyc = 2T WS
2-16
DD
No.
= 5.0 V 10%; TJ = –40 to +115˚C; CL = 50 pF + 1 TTL load
52
53
54
55
56
57
58
59
60
62
63
64
65
66
67
68
69
WR and RD Deassertion High to BS Assertion Low
(Two Successive Bus Cycles)
Address Valid to WR Assertion
WR Width Assertion
WR Deassertion to R/W, Address Invalid
WR Assertion to D0–D15 Out Valid
Data Out Hold Time from WR Deassertion
Data Out Set up Time to WRDeassertion
RD Deassertion to Address not valid
Address valid to RD Deassertion
RD Assertion width
Address valid to input data valid
Address valid to RD Assertion
RD Assertion to input data valid
WR Deassertion to RD Assertion
RD Deassertion to RD Assertion
WR Deassertion to WR Assertion
RD Deassertion to WR Assertion
a. WS = 0
b. WS > 0
a. WS = 0
b. WS > 0
a. WS = 0
b. WS > 0
Table 2-9 External Bus Asynchronous Timing
Characteristics
DSP56167/D, Rev. 1
WT + T – 3.3
WT + 3T – 7
Min
12.5
10.4
22.1
18.6
13.1
16.0
6.4
3.3
4.0
5.0
4.0
6.8
8.5
14
18
—
—
—
60 MHz
WT + 3T – 5
Max
2.0
—
—
—
—
—
—
—
—
—
—
—
—
22
—
—
—
—
—
MOTOROLA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns