saf7129ah NXP Semiconductors, saf7129ah Datasheet - Page 3
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saf7129ah
Manufacturer Part Number
saf7129ah
Description
Saf7129ah Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAF7129AH.pdf
(56 pages)
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Philips Semiconductors
1
3
2004 Mar 16
SAF7129AH
TYPE NUMBER
Monolithic CMOS 3.3 V device, 5 V I
Digital PAL/NTSC/SECAM encoder
System pixel frequency 13.5 MHz
54 MHz double-speed multiplexed D1 interface capable
of splitting data into two separate channels (encoded
and baseband)
Three Digital-to-Analog Converters (DACs) for CVBS
(CSYNC), VBS (CVBS) and C (CVBS) two times
oversampled with 10-bit resolution (signals in brackets
optional)
Three DACs for RED (C
two times oversampled with 9-bit resolution (signals in
brackets optional)
Alternatively, an advanced composite sync is available
on the CVBS output for RGB display centreing
Real-time control of subcarrier
Cross-colour reduction filter
Closed captioning encoding and World Standard
Teletext (WST) and North-American Broadcast Text
System (NABTS) teletext encoding including sequencer
and filter
Copy Generation Management System (CGMS)
encoding (CGMS described by standard CPR-1204 of
EIAJ); 20 bits in lines 20/283 (NTSC) can be loaded via
I
Fast I
Line 23 Wide Screen Signalling (WSS) encoding
Video Programming System (VPS) data encoding in
line 16 (50/625 lines counting)
Digital video encoder
2
C-bus
FEATURES
ORDERING INFORMATION
2
C-bus control port (400 kHz)
QFP44
NAME
R
), GREEN (Y) and BLUE (C
plastic quad flat package; 44 leads (lead length 1.6 mm);
body 10
2
C-bus optional
10
2 mm
B
)
3
DESCRIPTION
2
The SAF7129AH encodes digital C
NTSC, PAL or SECAM CVBS or S-video signal.
Simultaneously, RGB or bypassed but interpolated
C
Through a 54 MHz multiplexed digital D1 input port, the
circuit accepts two ITU-R BT.656 compatible C
data streams with 720 active pixels per line in
4 : 2 : 2 multiplexed formats. For example, an MPEG
decoded data with overlay and MPEG decoded data
without overlay, where one data stream is latched at the
rising, the other one is latched at the falling clock edge.
It includes a sync/clock generator and on-chip DACs.
B
PACKAGE
Encoder can be master or slave
Programmable horizontal and vertical input
synchronization phase
Programmable horizontal sync output phase
Internal Colour Bar Generator (CBG)
Controlled rise/fall times of output syncs and blanking
On-chip crystal oscillator (3rd-harmonic or fundamental
crystal)
Down mode (low output voltage) or power-save mode of
DACs
QFP44 package.
-Y-C
GENERAL DESCRIPTION
R
signals are available via three additional DACs.
B
-Y-C
SAF7129AH
Product specification
R
video data to an
VERSION
SOT803-1
B
-Y-C
R