saa7103h-v4 NXP Semiconductors, saa7103h-v4 Datasheet - Page 38

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saa7103h-v4

Manufacturer Part Number
saa7103h-v4
Description
Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
SAA7102_SAA7103_4
Product data sheet
Table 30:
Table 31:
Table 32:
5 + 6 + 5-bit 4 : 4 : 4 non-interlaced RGB
Pin
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
8 + 8 + 8-bit 4 : 2 : 2 non-interlaced C
Pin
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
8 + 8 + 8-bit 4 : 2 : 2 interlaced C
Pin
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
Pin assignment for input format 2
Pin assignment for input format 3
Pin assignment for input format 4
Falling clock
edge n
C
C
C
C
C
C
C
C
Rising clock
edge n
C
C
C
C
C
C
C
C
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
7(0)
6(0)
5(0)
4(0)
3(0)
2(0)
1(0)
0(0)
7(0)
6(0)
5(0)
4(0)
3(0)
2(0)
1(0)
0(0)
Rev. 04 — 18 January 2006
Falling clock edge
G2
G1
G0
B4
B3
B2
B1
B0
B
-Y-C
B
Rising clock
edge n
Y7(0)
Y6(0)
Y5(0)
Y4(0)
Y3(0)
Y2(0)
Y1(0)
Y0(0)
Rising clock
edge n + 1
Y7(0)
Y6(0)
Y5(0)
Y4(0)
Y3(0)
Y2(0)
Y1(0)
Y0(0)
R
-Y-C
(ITU-R BT.656, 27 MHz clock)
R
SAA7102; SAA7103
Falling clock
edge n + 1
C
C
C
C
C
C
C
C
Rising clock
edge n + 2
C
C
C
C
C
C
C
C
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
7(0)
6(0)
5(0)
4(0)
3(0)
2(0)
1(0)
0(0)
7(0)
6(0)
5(0)
4(0)
3(0)
2(0)
1(0)
0(0)
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Rising clock edge
R4
R3
R2
R1
R0
G5
G4
G3
Digital video encoder
Rising clock
edge n + 1
Y7(1)
Y6(1)
Y5(1)
Y4(1)
Y3(1)
Y2(1)
Y1(1)
Y0(1)
Rising clock
edge n + 3
Y7(1)
Y6(1)
Y5(1)
Y4(1)
Y3(1)
Y2(1)
Y1(1)
Y0(1)
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