saa7103h-v4 NXP Semiconductors, saa7103h-v4 Datasheet - Page 7
saa7103h-v4
Manufacturer Part Number
saa7103h-v4
Description
Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7103H-V4.pdf
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Philips Semiconductors
7. Functional description
SAA7102_SAA7103_4
Product data sheet
Table 4:
[1]
[2]
[3]
[4]
[5]
The digital video encoder encodes digital luminance and color difference signals
(C
C
The SAA7102; SAA7103 can be directly connected to a PC video graphics controller with
a maximum resolution of 800 × 600 at a 50 Hz or 60 Hz frame rate. A programmable
scaler scales the computer graphics picture so that it will fit into a standard TV screen with
an adjustable underscan area. Non-interlaced-to-interlaced conversion is optimized with
an adjustable anti-flicker filter for a flicker-free display at a very high sharpness.
Besides the most common 16-bit 4 : 2 : 2 C
edge clocking), other C
Table 28
A complete 3 × 256 bytes Look-Up Table (LUT), which can be used, for example, as a
separate gamma corrector, is located in the RGB domain; it can be loaded either through
the video input port Pixel Data (PD) or via the I
The SAA7102; SAA7103 supports a 32-bit × 32-bit × 2-bit hardware cursor, the pattern of
which can also be loaded through the video input port or via the I
It is also possible to encode interlaced 4 : 2 : 2 video signals such as PC-DVD; for that the
anti-flicker filter, and in most cases the scaler, will simply be bypassed.
Symbol
V
TRST
TDI
V
V
PD4
PD5
PD6
PD7
R
DDA2
SSD2
DDD2
B
-Y-C
-Y-C
Pin type: I = input, O = output, S = supply.
In accordance with the “IEEE1149.1” standard the pins TDI, TMS, TCK and TRST are input pins with an
internal pull-up resistor and TDO is a 3-state output pin.
Pins FSVGC, VSVGC, CBO, HSVGC and TTXRQ_XCLKO2 are used for bootstrapping; see
For board design without boundary scan implementation connect TRST to ground.
This pin provides easy initialization of the BST circuit. TRST can be used to force the Test Access Port
(TAP) controller to the TEST_LOGIC_RESET state (normal operation) at once.
B
R
signals. NTSC M, PAL B/G and sub-standards are supported.
) or digital RGB signals into analog CVBS, S-video and, optionally, RGB or
to
Pin description
Table
33.
Pin
LBGA156 QFP44
B6, D6
A4
B5
C5, D5
D4
A3
B3
B4
A2
Rev. 04 — 18 January 2006
B
-Y-C
…continued
R
and RGB formats are also supported; see
36
37
38
39
40
41
42
43
44
Type
S
I
I
S
S
I
I
I
I
B
[1]
-Y-C
2
SAA7102; SAA7103
C-bus.
Description
analog supply voltage 2 (3.3 V for DACs and
oscillator)
test reset input for BST; active LOW
test data input for BST
digital ground 2
digital supply voltage 2 (3.3 V for core)
MSB − 3 with C
see
MSB − 2 with C
see
MSB − 1 with C
see
MSB with C
see
R
input format (using 8 pins with double
Table 28
Table 28
Table 28
Table 28
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
B
-Y-C
to
to
to
to
B
B
B
Table 33
Table 33
Table 33
Table 33
-Y-C
-Y-C
-Y-C
R
2
4 : 2 : 2;
C-bus.
Digital video encoder
R
R
R
[2]
4 : 2 : 2;
4 : 2 : 2;
4 : 2 : 2;
for pin assignment
for pin assignment
for pin assignment
for pin assignment
Section
[2] [4] [5]
7 of 84
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