saa7157 NXP Semiconductors, saa7157 Datasheet - Page 4

• Manufacturer Part Number: saa7157
• Description: Clock Signal Generator Circuit For Digital Tv Systems Scgc
• Manufacturer: NXP Semiconductors

Philips Semiconductors
CREF output
TV2 digital clock reference output signal. Clock qualifier signal to TV system with 2 times of LFCO or LFCO2 frequency.
Power-on reset
Power-on reset is activated at power-on, when the supply voltage decreases below 3.5 V (Fig.4) or when chip enable is
done. The indicator output RESN is LOW for a time determined by capacitor on pin 3. The RESN signal can be applied
to reset other circuits of this digital TV system.
The LFCO or LFCO2 input signals have to be applied before RESN becomes HIGH.
PINNING
Note
1. MS and LFCO2 functions are not tested. LFCO2 is a multiple of horizontal frequency.
May 1992
SYMBOL
MS
CE
PORD
V
V
V
LL1.5A
V
V
LL1.5B
LFCO
RESN
V
LL3A
CREF
LFCOSEL
V
V
LFCO2
LL3B
SSA
DDA
SSD1
DDD1
SSD2
SSD3
DDD2
SSD4
Clock signal generator circuit for digital TV
systems (SCGC)
PIN
10
12
13
14
15
16
17
18
19
20
11
1
2
3
4
5
6
7
8
9
line-locked frequency control input signal 1
reset output (active-LOW, Fig.4)
DESCRIPTION
mode select input (LOW = PLL mode)
chip enable /reset (HIGH = outputs enabled)
power-on reset delay, dependent on external capacitor
analog ground (0 V)
analog supply voltage ( 5 V)
digital ground 1 (0 V)
line-locked clock output signal 1.5A (4 times f
digital supply voltage 1 ( 5 V)
digital ground 2 (0 V)
line-locked clock output signal 1.5B (4 times f
digital ground 3 (0 V)
line-locked clock output signal 3A (2 times f
clock reference output, qualifier signal (2 times f
LFCO source select (LOW = LFCO selected)
digital supply voltage 2 ( 5 V)
digital ground 4 (0 V)
line-locked frequency control input signal 2
line-locked clock output signal 3B (2 times f
4
(1)
LFCO
LFCO
LFCO
LFCO
(1)
)
LFCO
)
)
)
)
Product specification
SAA7157