saa7157 NXP Semiconductors, saa7157 Datasheet - Page 7

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saa7157

Manufacturer Part Number
saa7157
Description
Clock Signal Generator Circuit For Digital Tv Systems Scgc
Manufacturer
NXP Semiconductors
Datasheet

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Notes
1. f
2. t
3. MS and LFCO2 functions not tested.
May 1992
handbook, full pagewidth
Output signals LL1.5A, LL1.5B, LL3A and LL3B (pins 7, 10, 14, and 20); note 3
V
V
t
f
t
t
comp
LL
r
LL
, t
OL
OH
Clock signal generator circuit for digital TV
systems (SCGC)
SYMBOL
f
components. Measurements taken between 0.6 V and 2.6 V. Skew between two LLx clocks will not deviate more
than 2 ns if output loads are matched within 20%.
LFCO
comp
is the rise time from LOW of all clocks to HIGH of all clocks (Fig.3) including rise time, skew and jitter
= 7.0 MHz and output load 40 pF (Fig.3). V
CREF
LL1.5A
LL1.5B
LL3A
LL3B
output voltage LOW
output voltage HIGH
composite rise time
output frequency LL1.5A
output frequency LL1.5B
output frequency LL3A
output frequency LL3B
rise and fall times
duty factor LL1.5A, LL1.5B, LL3A
and LL3B (mean values)
t comp
PARAMETER
t LL1.5H
t HD
t LL3H
t LL1.5
Fig.3 Output timing.
t f
SSA
and V
I
I
Fig.3; notes 1 and 2 -
Fig.3
note 1; Fig.3
note 1; Fig.3;
at 1.5 V level
t LL1.5L
O L
OH
t LL3
7
t f
CONDITIONS
= 0.5 mA
= 2 mA
t SU
SSD
short connected together.
t r
t HD
t LL3L
0
2.6
-
-
-
-
-
43
MIN.
-
-
-
4 f
4 f
2 f
2 f
-
50
TYP.
t r
LFCO(2)
LFCO(2)
LFCO(2)
LFCO(2)
Product specification
0.6
V
8
5
57
MEH456
MAX.
DDD
2.4 V
0.6 V
2.6 V
1.5 V
0.6 V
2.6 V
1.5 V
0.6 V
SAA7157
V
V
ns
MHz
MHz
MHz
MHz
ns
%
UNIT

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