saa7167 NXP Semiconductors, saa7167 Datasheet
saa7167
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saa7167 Summary of contents
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... DATA SHEET SAA7167 YUV-to-RGB Digital-to-Analog Converter (DAC) Preliminary specification Supersedes data of 1995 Jun 13 File under Integrated Circuits, IC22 INTEGRATED CIRCUITS 1995 Nov 03 ...
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... RGB inputs. The final analog outputs are buffered with built-in voltage output amplifiers to provide the direct driving capability for a 150 load. Figure 1 shows the overall block diagram. The operation of SAA7167 is controlled via the I PARAMETER PACKAGE DESCRIPTION 2 Preliminary specification ...
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... Nov 03 C ref(h) Bin Gin Rin 36 YUV 8-BIT TO DAC MUX RGB (3 ) MATRIX CLOCK SAA7167 GENERATOR 6 10 VCLK PCLK Fig.1 Block diagram. 3 Preliminary specification SAA7167 MIXER OPAMP MIXER OPAMP MIXER OPAMP KEYING CONTROL MGB743 EXTKEY Rout 32 Gout 30 Bout 28 ...
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... Red signal output Rin 33 analog Red signal input V 34 analog ground 1 SSA1 V 35 analog supply voltage 1 DDA1 C 36 capacitor for reference high voltage output (2.25 V) ref(h) 1995 Nov 03 DESCRIPTION 2 C-bus 4 Preliminary specification SAA7167 I I/O I ...
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... UV1 UV0 VCLK V DDD V SSD HREF PCLK AP SP 1995 Nov 03 DESCRIPTION SAA7167 Fig.2 Pin configuration. 5 Preliminary specification SAA7167 I ref( DDA1 35 V SSA1 34 33 Rin 32 Rout 31 Gin 30 Gout ...
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... Philips Semiconductors YUV-to-RGB Digital-to-Analog Converter (DAC) FUNCTIONAL DESCRIPTION The SAA7167 contains a video data path, 3 analog mixers and voltage output amplifiers for the RGB channels respectively, a keying control block as well control block. Video data path The video data path includes a video data re-formatter, a YUV-to-RGB colour space conversion matrix, and triple 8-bit DACs ...
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... PCLK 110 2 8-bit pixel high colour mode 2 with pixels given only at rising edges of PCLK 111 3 8-bit pixel true colour mode 8-bit pixel input modes presumed that all input SAA7167 2 C REMARK 8-bit or ...
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... Notes START condition. 2. Slave address = 1011 111X; this slave address is identical to the one for the SAA9065 R/W control bit order to write order to read (not used for SAA7167 acknowledge; generated by the slave. 4. Subaddress = subaddress byte. 5. Data = data byte STOP condition. ...
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... PCLK) the data value compared for 24-bit pixel colour key PARAMETER = 50 MHz) clk load) 9 Preliminary specification DESCRIPTION 2 C-bus programming. MIN. TYP. MAX. 4.75 5.0 5.25 4.75 5.0 5.25 100 3 V DDD 0.5 +1.5 2 0.8 0.7 1 SAA7167 UNIT 0 LSB LSB ...
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... DAC analog output propagation delay measured from the 50% point of the rising edge of VCLK to the 50% point of full-scale transition. 1995 Nov 03 PARAMETER 10 Preliminary specification MIN. TYP. MAX 20T + t VCLK PD 12T + t VCLK 2 SAA7167 UNIT MHz % MHz MHz MHz MHz % MHz V/ s ...
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... HREF YUV UV handbook, full pagewidth PCLK 1995 Nov 03 t su1 su1 Fig.3 Video data input timing. t su2 t h2 pixel 1 pixel 2 pixel 3 Fig.4 Pixel data timing; 8-bit pixel colour key. 11 Preliminary specification pixel 4 pixel 5 pixel 6 SAA7167 MGB745 pixel 7 MGB746 ...
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... Fig.5 Pixel data input timing; 2 8-bit pixel colour key; mode 1. handbook, full pagewidth PCLK Fig.6 Pixel data input timing; 2 8-bit pixel colour key; mode 2. 1995 Nov 03 t su2 t h2 pixel 1 t su2 t h2 pixel 1 pixel 2 12 Preliminary specification t su3 t h3 pixel 2 pixel 3 pixel 3 SAA7167 MGB747 MGB748 ...
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... VCLK YUV and UV (full-scale transition) Rout, Bout and Gout 1995 Nov 03 t su2 t h2 pixel 1 Fig.7 Pixel data input timing; 3 8-bit pixel colour key. T group Fig.8 DAC output timing. 13 Preliminary specification pixel MGB750 SAA7167 MGB749 ...
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... VGA 1995 Nov 48 Rin SAA7167 Gin Bin Fig.9 Typical application diagram for analog circuits. 14 Preliminary specification C ref(h) 0 monitor 47 Rout 75 47 Gout 75 47 Bout 75 cable monitor side MGB751 SAA7167 ...
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... 2.5 scale (1) ( 0.27 0.18 7.1 7.1 9.15 0.5 0.17 0.12 6.9 6.9 8.85 REFERENCES JEDEC EIAJ 15 Preliminary specification detail 9.15 0.75 0.69 1.0 0.2 0.12 8.85 0.45 0.59 EUROPEAN PROJECTION SAA7167 SOT313 (1) ( 0.95 0.95 7 0.1 o 0.55 0.55 0 ISSUE DATE 93-06-15 94-12-19 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 16 Preliminary specification SAA7167 ...
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... I Philips. This specification can be ordered using the code 9398 393 40011. 1995 Nov components conveys a license under the Philips’ system provided the system conforms to the I 17 Preliminary specification SAA7167 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors YUV-to-RGB Digital-to-Analog Converter (DAC) 1995 Nov 03 NOTES 18 Preliminary specification SAA7167 ...
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... Philips Semiconductors YUV-to-RGB Digital-to-Analog Converter (DAC) 1995 Nov 03 NOTES 19 Preliminary specification SAA7167 ...
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Philips Semiconductors – a worldwide company Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, ...