saa7167 NXP Semiconductors, saa7167 Datasheet - Page 8

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saa7167

Manufacturer Part Number
saa7167
Description
Yuv-to-rgb Digital-to-analog Converter Dac
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Voltage output amplifiers
Before the analog input enters the analog mixers, it passes
through voltage output amplifiers. Level shifters are used
internally to provide an offset of 0.2 V and an amplifier gain
of 2 for analog inputs to match with the output levels from
DACs. After buffering with voltage output amplifiers, the
final RGB outputs can drive a 150
internal resistor, 50
load resistor at monitor side (see Fig.9).
The output voltage level of DAC ranges from the lowest
level 0.2 V (zero code) to the highest level 1.82 V (all one
code).
Table 6 I
Notes
1. S = START condition.
2. Slave address = 1011 111X; this slave address is identical to the one for the SAA9065; X = R/W control bit:
3. A = acknowledge; generated by the slave.
4. Subaddress = subaddress byte.
5. Data = data byte.
6. P = STOP condition.
Table 7 Control data byte
1995 Nov 03
S
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SUBADDRESS
a) X = 0; order to write.
b) X = 1; order to read (not used for SAA7167).
00
01
02
slave address
2
C-bus format
external serial resistor, and 75
KMOD2
KD7
D7
0
A
KMOD1
load directly (25
KD6
D6
0
subaddress
KMOD0
KD5
D5
0
8
With the digital input YUV video data in accordance with
CCIR-601, the RGB output of 8-bit DAC actually ranges
from the 16th step (black) to the 235th step (white).
Therefore, after the voltage divider with external serial
resistor and monitor load resistor, the output voltage range
to monitor is approximately 0.7 V (peak-to-peak).
I
Only one control byte is needed for the SAA7167.
The I
2
DRP
KD4
C-bus control
D4
0
A
2
C-bus format is shown in Table 6.
KEN
KD3
D3
data
0
KDLY2
KINV
KD2
D2
Preliminary specification
A
FMTC1
KDLY1
KD1
D1
SAA7167
P
FMTC0
KDLY0
KD0
D0

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