ep1k30 Altera Corporation, ep1k30 Datasheet - Page 38

• Manufacturer Part Number: ep1k30
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

ACEX 1K Programmable Logic Device Family Data Sheet
38
t
t
t
f
f
f
t
t
t
t
R
F
INDUTY
CLK1
CLK2
CLKDEV
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 11. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices
Symbol
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost clock
multiplication factor equals 1)
Input clock frequency (ClockBoost clock
multiplication factor equals 2)
Input deviation from user specification in the
Altera software
Input clock stability (measured between
adjacent clocks)
Time required for ClockLock or ClockBoost
to acquire lock
Jitter on ClockLock or ClockBoost-
generated clock
Duty cycle for ClockLock or ClockBoost-
generated clock
(3)
(1)
Parameter
(4)
Tables 11
for -1 and -2 speed-grade devices, respectively.
and
12
summarize the ClockLock and ClockBoost parameters
t
t
INCLKSTB
INCLKSTB
Condition
<100
< 50
Min
40
25
16
40
Typ
50
Altera Corporation
250
200
25,000
Max
180
100
(2)
60
90
10
60
5
5
(4)
(4)
PPM
MHz
MHz
Unit
ns
ns
ps
ps
ps
%
%
s