ep1k30 Altera Corporation, ep1k30 Datasheet - Page 70
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ep1k30
Manufacturer Part Number
ep1k30
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP1K30.pdf
(86 pages)
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ACEX 1K Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
(2)
(3)
(4)
70
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LUT
CLUT
RLUT
PACKED
EN
CICO
CGEN
CGENR
CASC
C
INSUBIDIR
INHBIDIR
INSUBIDIR
INHBIDIR
OUTCOBIDIR
XZBIDIR
ZXBIDIR
OUTCOBIDIR
XZBIDIR
ZXBIDIR
Table 43. EP1K30 External Bidirectional Timing Parameters
Table 44. EP1K50 Device LE Timing Microparameters (Part 1 of 2)
All timing parameters are described in
These parameters are specified by characterization.
This parameter is measured without the use of the ClockLock or ClockBoost circuits.
This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Symbol
Symbol
(3)
(3)
(4)
(4)
(3)
(4)
(3)
(4)
(3)
(4)
Min
Min
2.8
0.0
3.8
0.0
2.0
0.5
Tables 44
-1
-1
Max
Max
4.9
6.1
6.1
3.9
5.1
5.1
0.6
0.5
0.6
0.2
0.6
0.1
0.4
0.1
0.5
0.5
through
Tables 22
Min
Min
3.9
0.0
4.9
0.0
2.0
0.5
Speed Grade
Speed Grade
50
through
show EP1K50 device external timing parameters.
-2
-2
29
Max
Max
5.9
7.5
7.5
4.9
6.5
6.5
0.8
0.6
0.7
0.3
0.7
0.1
0.5
0.1
0.8
0.6
in this data sheet.
Notes
Min
Min
(1),
5.2
0.0
2.0
–
–
–
Note (1)
(2)
-3
-3
Max
Max
7.6
9.7
9.7
1.1
0.8
0.9
0.4
0.9
0.1
0.6
0.1
1.0
0.8
–
–
–
Altera Corporation
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns