xa6slx9 Xilinx Corp., xa6slx9 Datasheet
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xa6slx9 Summary of contents
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DS170 (v1.0) March 2, 2010 General Description The Xilinx Automotive (XA) Spartan®-6 family of FPGAs provides leading system integration capabilities with the lowest total cost for high- volume automotive applications. The nine-member family delivers expanded densities ranging from 3,840 to ...
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... XA6SLX25T XA6SLX45T XA6SLX75T Notes Spartan-6 devices are available in Pb-free packages only. 2. Memory controller block support the XA6SLX9 and XA6SLX16 devices in the CSG225 package. DS170 (v1.0) March 2, 2010 Advance Product Specification XA Spartan-6 Automotive FPGA Family Overview Block RAM Blocks DSP48A1 Max ...
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Configuration XA Spartan-6 FPGAs store the customized configuration data in SRAM-type internal latches. The number of configuration bits is between 2.6 Mb and 18.8 Mb depending on device size but independent of the specific user-design implementation, unless compression mode is ...
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SLICEL One quarter (25%) of the XA Spartan-6 FPGA slices are SLICELs, which contain all the features of the SLICEM except the memory/shift register function. SLICEX One half (50%) of the XA Spartan-6 FPGA slices are SLICEXs. The SLICEXs have ...
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Clock Distribution Each XA Spartan-6 FPGA provides abundant clock lines to address the different clocking requirements of high fanout, short propagation delay, and extremely low skew. Global Clock Lines In each XA Spartan-6 FPGA, 16 global-clock lines have the highest ...
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Digital Signal Processing—DSP48A1 Slice DSP applications use many binary multipliers and accumulators, best implemented in dedicated DSP slices. All XA Spartan-6 FPGAs have many dedicated, full-custom, low-power DSP slices, combining high speed with small size, while retaining system design flexibility. ...
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ISERDES and OSERDES Many applications combine high-speed bit-serial I/O with slower parallel operation inside the device. This requires a serializer and deserializer (SerDes) inside the I/O structure. Each input has access to its own deserializer (serial-to-parallel converter) with programmable parallel ...
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Xilinx provides a light-weight (<100 LUT), configurable, easy-to-use LogiCORE™ IP that ties the various building blocks (the integrated Endpoint block for PCI Express technology, the GTP transceivers, block RAM, and clocking resources) into a compliant Endpoint solution. The system designer ...
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XA Spartan-6 FPGA Documentation Complete and up-to-date documentation of the Spartan-6 family of FPGAs is available on the Xilinx website at http://www.xilinx.com/support/documentation/spartan-6.htm. Please utilize these documents for XA Spartan-6 FPGA development. The Spartan-6 FPGA documents will be updated with XA ...