cy8c26233-24sxit Cypress Semiconductor Corporation., cy8c26233-24sxit Datasheet - Page 74

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cy8c26233-24sxit

Manufacturer Part Number
cy8c26233-24sxit
Description
8-bit Programmable System-on-chip Psoc? Microcontrollers
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
10.6
All analog PSoC blocks in a particular Analog Column
share the same clock signal. Choosing the clocking for
an analog PSoC block is a two-step process.
1.
10.6.1 Analog Column Clock Select Register
Table 63:
Analog Column Clock Select Register (CLK_CR0, Address = Bank 1, 60h)
74
Bit [7:6] : Acolumn3 [1:0]
0 0 = 24V1
0 1 = 24V2
1 0 = ACLK0
1 1 = ACLK1
Bit [5:4] : Acolumn2 [1:0]
0 0 = 24V1
0 1 = 24V2
1 0 = ACLK0
1 1 = ACLK1
Bit [3:2] : Acolumn1 [1:0]
0 0 = 24V1
0 1 = 24V2
1 0 = ACLK0
1 1 = ACLK1
Bit [1:0] : Acolumn0 [1:0]
0 0 = 24V1
0 1 = 24V2
1 0 = ACLK0
1 1 = ACLK1
Bit Name
Read/
Write
Bit #
POR
First, if the user wants to use the ACLK0 and
ACLK1 system-clocking signals, the digital PSoC
blocks that serve as the source for these signals
must be selected. This selection is made in the Ana-
log Clock Select Register (CLK_CR1).
Analog PSoC Block Clocking Options
Analog Column Clock Select Register
Acolumn3
RW
[1]
7
0
Acolumn3
RW
[0]
6
0
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
Acolumn2
RW
[1]
5
0
Acolumn2
RW
[0]
4
0
2.
Next, the user must select the source for the
Acolumn0 , Acolumn1 , Acolumn2 , and Acolumn3
system-clocking signals. The user will choose the
clock for Acolumnx[1:0] bits in the Analog Column
Clock Select Register (CLK_CR0). Each analog
PSoC block in a particular Analog Column is
clocked from the Acolumn[x] system-clocking sig-
nal for that column. (Note that the Acolumn[x] sig-
nals have a 1:4 divider on them.)
Acolumn1
RW
[1]
3
0
Acolumn1
RW
[0]
2
0
Acolumn0
RW
[1]
1
0
September 5, 2002
Acolumn0
RW
[0]
0
0

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