ml675050 Oki Semiconductor, ml675050 Datasheet - Page 50

• Manufacturer Part Number: ml675050
• Description: Arm7tdmi Based Micro-controller For Ic Card Reader/writer
• Manufacturer: Oki Semiconductor

ELECTRICAL CHARACTERISTICS (AC CHARACTERISTICS)
(16) External IO0,1 Timing (1/3)
IOCSn_N read access time
(IO0/IO1)
IOCSn_N write access time
(IO0/IO1)
XA[23:0] read access time
(IO0/IO1)
XA[23:0] write access time
(IO0/IO1)
BS0_N, BS1_N
read access tim (IO0/IO1)
BS0_N, BS1_N
write access time (IO0/IO1)
RD_N pulse width
(IO0/IO1)
WR_N pulse width
(IO0/IO1)
IOCSn_N output hold time
(IO0/IO1 : Read)
IOCSn_N output hold time
(IO0/IO1 : Write)
XA[23:0] output hold time 1
(IO0/IO1 : Read)
XA[23:0] output hold time 2
(IO0/IO1 : Read)
XA[23:0] output hold time
(IO0/IO1 : Write)
BS0_N, BS1_N
output hold time 1
(IO0/IO1 : Read)
BS0_N, BS1_N
output hold time 2
(IO0/IO1 : Read)
BS0_N, BS1_N
output hold time
(IO0/IO1 : Write)
XD[15:0] input setup time
(IO0/IO1)
XD[15:0] input hold time
(IO0/IO1)
XD[15:0] output setup time
(IO0/IO1)
XD[15:0] output hold time
(IO0/IO1)
OKI Semiconductor
Note: n = 0 to 1.
Parameter
t
t
t
t
t
t
Symbol
IOCSWACC
IOXAWACC
IOBSWACC
IOCSRACC
t
t
t
t
IOXARACC
IOBSRACC
t
t
t
t
t
t
IOXARH1
IOXARH2
IOBSRH1
IOBSRH2
IOCSWH
IOXAWH
IOBSWH
t
t
IOWRW
IOCSRH
t
IORDW
t
IODOS
IODOH
IODIS
IODIH
Condition
30 pF
CL =
(n
(n
(n
(n
(n
(n
(n
n
n
n
n
1
1
1
+n
+n
+n
t
t
t
t
t
t
t
Min.
1
1
1
2
2
3
3
1
t
t
t
HC
HC
HC
HC
HC
HC
HC
15.5
+n
+n
+n
+n
t
t
t
t
HC
HC
HC
HC
HC
HC
HC
- 7
0
2
2
2
)t
-3
)t
-5
)t
-5
- 3
- 3
- 3
- 3
- 3
- 3
- 3
2
2
2
2
+1)
+1)
+1)
- 4
- 4
- 3
- 3
)t
HC
HC
HC
HC
-3
-4
-4
Typ.
(n
(n
(n
(n
(n
(n
n
n
1
1
1
+n
+n
+n
Max.
2
2
1
1
1
t
t
t
HC
HC
HC
t
t
+n
+n
+n
HC
HC
2
2
2
)t
+4
)t
+3
)t
+3
2
2
2
+ 4
+ 4
HC
+1)
HC
+1)
HC
+1)
+4
+3
+3
Unit
ns
*: The address setup, RD_N/WR_N
*: Address hold time is fixed by a
*: XWAIT is not used.
pulse width, and data off time
when
accessed are the parameters
that can be set by the IOAC
register.
For more details, see the
upper table on page 29-26.
combination of the type of read
access, data size at the time of
read access, and IO bus width.
For more details, see the lower
table on page 29-26.
n
n
n
t
HC
1
2
3
= Address setup
= Access pulse width
= Address hold time
= AHB_CLK period
IO0
FEDL675050-02
Remarks
ML675050
and
50/62
IO1
are