cp3ub17 National Semiconductor Corporation, cp3ub17 Datasheet - Page 6
cp3ub17
Manufacturer Part Number
cp3ub17
Description
Reprogrammable Connectivity Processor With Usb Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3UB17.pdf
(202 pages)
- Current page: 6 of 202
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3.16
The Direct Memory Access Controller (DMAC) can speed
up data transfer between memory and I/O devices or be-
tween two memories, relative to data transfers performed di-
rectly by the CPU. A method called cycle-stealing allows the
CPU and the DMAC to use the core bus in parallel. The
DMAC implements four independent DMA channels. DMA
requests from a primary and a secondary source are recog-
nized for each DMA channel, as well as a software DMA re-
quest issued directly by the CPU. Table 1 shows the DMA
channel assignment on the CP3UB17 architecture. The fol-
lowing on-chip modules can assert a DMA request to the
DMAC:
Table 1 shows how the four DMA channels are assigned
to the modules listed above.
Channel
CR16C (Software DMA request)
USB
UART
Advanced Audio Interface
CVSD/PCM Converter
0
1
2
3
DMA CONTROLLER
Table 1 DMA Channel Assignment
Secondary
Secondary
Secondary
Secondary
Secondary
Primary/
Primary
Primary
Primary
Primary
CVSD/PCM
CVSD/PCM
Peripheral
Unused
UART
UART
USB
AAI
AAI
Transaction
Read/Write
Read
Write
Read
Read
Write
Write
N/A
6
3.17
The audio interface provides a serial synchronous, full-du-
plex interface to codecs and similar serial devices. Transmit
and receive paths operate asynchronously with respect to
each other. Each path uses three signals for communica-
tion: shift clock, frame synchronization, and data.
In case receive and transmit use separate shift clocks and
frame sync signals, the interface operates in its asynchro-
nous mode. Alternatively, the transmit and receive path can
share the same shift clock and frame sync signals for syn-
chronous mode operation.
The interface can handle data words of either 8- or 16-bit
length and data frames can consist of up to four slots.
In the normal mode of operation, the interface only transfers
one word at a periodic rate. In the network mode, the inter-
face transfers multiple words at a periodic rate. The periodic
rate is also called a data frame and each word within one
frame is called a slot. The beginning of each new data frame
is marked by the frame sync signal.
3.18
The CVSD/PCM module performs conversion between
CVSD and PCM data, in which the CVSD encoding is as de-
fined in the Bluetooth specification 1.0 and the PCM data
can be 8-bit µ-Law, 8-bit A-Law, or 13-bit to 16-bit Linear.
3.19
The Serial Debug Interface module (SDI module) provides
a JTAG-based serial link to an external debugger, for exam-
ple running on a PC. In addition, the SDI module integrates
an on-chip debug module, which allows the user to set up to
four hardware breakpoints on instruction execution and data
transfer. The SDI module can act as a CPU bus master to
access all memory mapped resources, such as RAM and
peripherals. It also provides fast program download into the
on-chip Flash program memory using the JTAG interface.
Note: The SDI module may assert Freeze mode to gather
information, which may cause periodic fluctuations in re-
sponse (bus availability, interrupt latency, etc.). Anomalous
behavior often may be traced to SDI activity.
3.20
The CP3UB17 is backed up by the software resources de-
signers need for rapid time-to-market, including an operat-
ing system, peripheral drivers, reference designs, and an
integrated development environment.
National Semiconductor offers a complete and industry-
proven application development environment for CP3UB17
applications, including the IAR Embedded Workbench,
iSYSTEM winIDEA and iC3000 Active Emulator, Develop-
ment Board, and Application Software. See your National
Semiconductor sales representative for current information
on availability and features of emulation equipment and
evaluation boards.
ADVANCED AUDIO INTERFACE
CVSD/PCM CONVERSION MODULE
SERIAL DEBUG INTERFACE
DEVELOPMENT SUPPORT
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