cp3ub17 National Semiconductor Corporation, cp3ub17 Datasheet - Page 67

• Manufacturer Part Number: cp3ub17
• Description: Reprogrammable Connectivity Processor With Usb Interface
• Manufacturer: National Semiconductor Corporation

14.1.6
The PxHDRV register is a byte-wide, read/write register that
controls the slew rate of the corresponding pins. The high
drive strength function is enabled when the corresponding
bits of the PxHDRV register are set. In both GPIO and alter-
nate function modes, the drive strength function is enabled
by the PxHDRV registers. At reset, the PxHDRV registers
are cleared, making the ports low speed.
PxHDRV
14.1.7
The PxALTS register selects which of two alternate func-
tions are selected for the port pin. These bits are ignored
unless the corresponding PxALT bits are set. Each port pin
can be controlled independently.
PxALTS
7
7
Port High Drive Strength Register (PxHDRV)
Port Alternate Function Select Register
(PxALTS)
The PxHDRV bits control whether output pins
are driven with slow or fast slew rate.
0
1
The PxALTS bits select among two alternate
functions. Table 31 shows the mapping of the
PxALTS bits to the alternate functions. Un-
used PxALTS bits must be clear.
–
–
Slow slew rate.
Fast slew rate.
PxHDRV
PxALTS
0
0
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14.2
A port pin can be configured to operate as an inverting
open-drain output buffer. To do this, the CPU must clear the
bit in the data output register (PxDOUT) and then use the
port direction register (PxDIR) to set the value of the port
pin. With the direction register bit set (direction = out), the
value zero is forced on the pin. With the direction register bit
clear (direction = in), the pin is placed in the TRI-STATE
mode. If desired, the internal weak pull-up can be enabled
to pull the signal high when the output buffer is in TRI-
STATE mode.
OPEN-DRAIN OPERATION
Table 31 Alternate Function Select
Port Pin
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PI0
PI1
PI2
PI3
PI4
PI5
PI6
PI7
PxALTS = 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MDIDO
MDODI
MWCS
SRFS
WUI9
MSK
RXD
TXD
CTS
SCK
STD
SRD
RTS
SFS
TA
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PxALTS = 1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SRCLK
WUI10
WUI11
WUI12
WUI13
WUI14
WUI15
TIO1
TIO2
TIO3
TIO4
TIO5
TIO6
TIO7
TIO8
NMI
TB