mc68hc908gr16 Freescale Semiconductor, Inc, mc68hc908gr16 Datasheet - Page 53
mc68hc908gr16
Manufacturer Part Number
mc68hc908gr16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GR16.pdf
(276 pages)
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3.7.4 ADC Voltage Reference Low Pin (V
The ADC analog portion uses V
to the same voltage potential as V
results. Any noise present on this pin will be reflected and possibly magnified in A/D conversion values.
V
3.7.5 ADC Voltage In (V
V
3.8 I/O Registers
These I/O registers control and monitor ADC operation:
3.8.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
COCO — Conversions Complete Bit
Freescale Semiconductor
SSAD
ADIN
•
•
•
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
is the input voltage signal from one of the eight ADC channels to the ADC module.
ADC status and control register (ADSCR)
ADC data register (ADRH and ADRL)
ADC clock register (ADCLK)
and V
REFL
Address:
For maximum noise immunity, route V
to V
Routing V
noise rejection.
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Reset:
Read:
Write:
are double-bonded on the MC68HC908GR16.
SS
, place bypass capacitors as close as possible to the package.
$003C
COCO
Figure 3-4. ADC Status and Control Register (ADSCR)
Bit 7
REFH
R
R
0
ADIN
close and parallel to V
= Reserved
REFL
AIEN
)
SS
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
. External filtering is often necessary to ensure a clean V
as its lower voltage reference pin. By default, connect the V
ADCO
5
0
REFL
NOTE
NOTE
ADCH4
4
1
REFL
)
REFL
may improve common mode
carefully and, if not connected
ADCH3
3
1
ADCH2
2
1
ADCH1
1
1
ADCH0
Bit 0
1
REFL
I/O Registers
REFL
for good
pin
53
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